Inventor · disambiguated record
Periannan Chidambaram
Also filed as: CHIDAMBARAM PERIANNAN · CHIDAMBARAM PERIANNAN R
58 granted patents·39 pending applications·344 citations·filing 2001–2024
98Inventor score
Files withQUALCOMM INC73TEXAS INSTRUMENTS INC19PINTO ANGELO2LU JIONG-PING1QUALCOMM TECHNOLOGIES INC1
Top patents by PatentIndex Score
97 records- 0198US11444068B2Three-dimensional (3D) integrated circuit device having a backside power delivery networkQUALCOMM INC·Filed 2020·Granted Sep 13, 2022·15 cites·10 claims
- 0298US11158590B1Capacitor interposer layer (CIL) in a die-to-wafer three-dimensional (3D) integrated circuit (IC) (3DIC)QUALCOMM INC·Filed 2020·Granted Oct 26, 2021·12 cites·20 claims
- 0395US10084074B1Compound semiconductor field effect transistor gate length scalingQUALCOMM INC·Filed 2017·Granted Sep 25, 2018·10 cites·14 claims
- 0495US7553717B2Recess etch for epitaxial SiGeTEXAS INSTRUMENTS INC·Filed 2007·Granted Jun 30, 2009·44 cites·11 claims
- 0595US6852603B2Fabrication of abrupt ultra-shallow junctionsTEXAS INSTRUMENTS INC·Filed 2003·Granted Feb 8, 2005·101 cites·9 claims
- 0694US11670614B2Integrated circuit assembly with hybrid bondingQUALCOMM INC·Filed 2020·Granted Jun 6, 2023·3 cites·20 claims
- 0794US10651122B1Integrated circuit (IC) interconnect structure having a metal layer with asymmetric metal line-dielectric structures supporting self-aligned vertical interconnect accesses (VIAS)QUALCOMM INC·Filed 2019·Granted May 12, 2020·12 cites·30 claims
- 0893US10825536B1Programmable circuits for performing machine learning operations on edge devicesQUALCOMM INC·Filed 2019·Granted Nov 3, 2020·19 cites·30 claims
- 0992US10861852B2Three-dimensional (3D), vertically-integrated field-effect transistors (FETs) for complementary metal-oxide semiconductor (CMOS) cell circuitsQUALCOMM INC·Filed 2018·Granted Dec 8, 2020·10 cites·34 claims
- 1092US7786518B2Growth of unfaceted SiGe in MOS transistor fabricationTEXAS INSTRUMENTS INC·Filed 2008·Granted Aug 31, 2010·30 cites·19 claims
- 1191US11652101B2Trench capacitor assembly for high capacitance densityQUALCOMM INC·Filed 2021·Granted May 16, 2023·2 cites·12 claims
- 1286US11417637B2Stacked decoupling capacitors with integration in a substrateQUALCOMM INC·Filed 2020·Granted Aug 16, 2022·2 cites·20 claims
- 1386US11201127B2Device comprising contact to contact coupling of packagesQUALCOMM INC·Filed 2020·Granted Dec 14, 2021·2 cites·39 claims
- 1486US11101228B1Integrated circuit package with a magnetic coreQUALCOMM INC·Filed 2020·Granted Aug 24, 2021·2 cites·20 claims
- 1583US12218041B2Integrated circuit (IC) packages employing a capacitor-embedded, redistribution layer (RDL) substrate for interfacing an IC chip(s) to a package substrate, and related methodsQUALCOMM INC·Filed 2021·Granted Feb 4, 2025·1 cites·20 claims
- 1681US7700467B2Methodology of implementing ultra high temperature (UHT) anneal in fabricating devices that contain sigeTEXAS INSTRUMENTS INC·Filed 2007·Granted Apr 20, 2010·8 cites·22 claims
- 1779US9997617B2Metal oxide semiconductor (MOS) isolation schemes with continuous active areas separated by dummy gates and related methodsQUALCOMM INC·Filed 2013·Granted Jun 12, 2018·4 cites·13 claims
- 1877US10840884B2Bulk acoustic wave (BAW) and passive-on-glass (POG) filter co-integrationQUALCOMM INC·Filed 2018·Granted Nov 17, 2020·2 cites·18 claims
- 1977US10247617B2Middle-of-line (MOL) metal resistor temperature sensors for localized temperature sensing of active semiconductor areas in integrated circuits (ICs)QUALCOMM INC·Filed 2016·Granted Apr 2, 2019·2 cites·14 claims
- 2077US7348232B2Highly activated carbon selective epitaxial process for CMOSTEXAS INSTRUMENTS INC·Filed 2005·Granted Mar 25, 2008·12 cites·18 claims
- 2176US2025118645A1Integrated circuit (ic) packages employing a capacitor-embedded, redistribution layer (rdl) substrate for interfacing an ic chip(s) to a package substrate, and related methodsQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2275US11894366B2Trench capacitor assembly for high capacitance densityQUALCOMM INC·Filed 2023·Granted Feb 6, 2024·0 cites·8 claims
- 2373US12455255B2CMOS integrated humidity sensor with built-in heaterQUALCOMM INC·Filed 2024·Granted Oct 28, 2025·0 cites·30 claims
- 2473US12300655B2Integrated circuit assembly with hybrid bondingQUALCOMM INC·Filed 2023·Granted May 13, 2025·0 cites·22 claims
- 2573US10090244B2Standard cell circuits employing high aspect ratio voltage rails for reduced resistanceQUALCOMM INC·Filed 2017·Granted Oct 2, 2018·2 cites·26 claims
- 2671US7179696B2Phosphorus activated NMOS using SiC processTEXAS INSTRUMENTS INC·Filed 2004·Granted Feb 20, 2007·12 cites·7 claims
- 2771US7129127B2Integration scheme to improve NMOS with poly cap while mitigating PMOS degradationTEXAS INSTRUMENTS INC·Filed 2004·Granted Oct 31, 2006·16 cites·21 claims
- 2869US11631614B2MIM capacitor with adjustable capacitance via electronic fusesQUALCOMM INC·Filed 2021·Granted Apr 18, 2023·0 cites·7 claims
- 2967US7553718B2Methods, systems and structures for forming semiconductor structures incorporating high-temperature processing stepsTEXAS INSTRUMENTS INC·Filed 2005·Granted Jun 30, 2009·2 cites·12 claims
- 3066US12513915B2Dynamic random-access memory (DRAM) on hot compute logic for last-level-cacheQUALCOMM INC·Filed 2023·Granted Dec 30, 2025·0 cites·20 claims
- 3165US7112516B2Fabrication of abrupt ultra-shallow junctionsTEXAS INSTRUMENTS INC·Filed 2003·Granted Sep 26, 2006·8 cites·5 claims
- 3263US11211290B2MIM capacitor with adjustable capacitance via electronic fusesQUALCOMM INC·Filed 2020·Granted Dec 28, 2021·0 cites·9 claims
- 3363US2025380406A1Vertical bank redundancy in three-dimensional stacked dynamic random-access memory (dram) for improved yieldQUALCOMM INC·Filed 2024·Application pending·0 cites
- 3463US2025380431A1High-bandwidth three-dimensional stacked memory with a base die enabling compute logic without memory power grid restrictionsQUALCOMM INC·Filed 2024·Application pending·0 cites
- 3562US7202537B2Versatile system for limiting electric field degradation of semiconductor structuresTEXAS INSTRUMENTS INC·Filed 2005·Granted Apr 10, 2007·2 cites·7 claims
- 3662US2025391739A1Dual-liner through-silicon via (tsv) for power and signal transmissionQUALCOMM INC·Filed 2024·Application pending·0 cites
- 3762US2025336891A1Single hybrid system-on-chip (soc) die structure with high memory bandwidth and densityQUALCOMM INC·Filed 2024·Application pending·0 cites
- 3861US2025385222A1High-bandwidth integrated circuit packaging of memory and logicQUALCOMM INC·Filed 2024·Application pending·0 cites
- 3961US2025380430A1High-bandwidth 3d stacked memory with a base die enabling compute logic without memory power grid restrictionsQUALCOMM INC·Filed 2024·Application pending·0 cites
- 4061US2025379188A1High-bandwidth memory (hbm) package-on-package (pop) dynamic random-access memory (dram) with semiconductor pillarsQUALCOMM INC·Filed 2024·Application pending·0 cites
- 4161US2025385209A1Bumpless fan-out wafer-level integrated circuit package including memory and logicQUALCOMM INC·Filed 2024·Application pending·0 cites
- 4261US2025386517A1High bandwidth small form factor 3d integrated circuit package including memory and logicQUALCOMM INC·Filed 2024·Application pending·0 cites
- 4360US2025336757A1Concurrent general-purpose memory die and near-memory compute die in system-in-package (sip)QUALCOMM INC·Filed 2024·Application pending·0 cites
- 4460US2025216250A1Methods and apparatus for ambient light sensor with spectral resolutionQUALCOMM INC·Filed 2023·Application pending·0 cites
- 4560US2025221057A1Ambient light energy harvesting deviceQUALCOMM INC·Filed 2023·Application pending·0 cites
- 4659US9048180B2Low stress sacrificial cap layerLU JIONG-PING·Filed 2006·Granted Jun 2, 2015·1 cites·14 claims
- 4759US7569499B2Semiconductor device made by multiple anneal of stress inducing layerTEXAS INSTRUMENTS INC·Filed 2006·Granted Aug 4, 2009·2 cites·16 claims
- 4859US2024105728A1Transistor devices with double-side contacts and standard cellQUALCOMM INC·Filed 2023·Application pending·0 cites
- 4958US2025185300A1Electronic devices employing thin-gate insulator transistors coupled to varactors to reduce gate-to-source/drain voltage to avoid voltage breakdown, and related fabrication methodsQUALCOMM INC·Filed 2023·Application pending·0 cites
- 5057US10164054B2Compound semiconductor field effect transistor with self-aligned gateQUALCOMM INC·Filed 2017·Granted Dec 25, 2018·0 cites·13 claims
Showing the top 50 of 97 patent records by PatentIndex Score.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →