Inventor

CHEN YEN-PIN

TW19 patents

⚠️ This page may combine multiple inventors who share the name “CHEN YEN-PIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHEN YEN-PIN

TAIWAN SEMICONDUCTOR MFG CO LTD

Systems and methods for context aware circuit design

Method of generating techfile having reduced corner variation value

Integrated circuit having a high cell density

Characterizing cell using input waveform generation considering different circuit topologies

Method and system for sigma-based timing optimization

Systems and methods for context aware circuit design

Integrated circuit having a high cell density

Systems and methods for context aware circuit design

Integrated circuit having a high cell density

Method and system for sigma-based timing optimization

Characterizing cell using input waveforms with different tail characteristics

Circuit design method and system

Integrated circuit having a high cell density

Method of generating netlist including proximity-effect-inducer (PEI) parameters

Semiconductor circuit design and manufacture method

Method of timing analysis

TAIWAN SEMICONDUCTOR MFG

Method of forming a layout including cells having different threshold voltages, a system of implementing and a layout formed

Layout re-decomposition for multiple patterning layouts

FU CHUNG-MIN

Cell-context aware integrated circuit design