Inventor
AKKINEPALLY PRANEETH
US13 patents
Patents
13 patentsUS10410940B2Sep 10, 2019
Semiconductor package with cavity
INTEL CORP2 citations70
US11574874B2Feb 7, 2023
Package architecture utilizing photoimageable dielectric (PID) for reduced bump pitch
INTEL CORP0 citations62
US11571876B2Feb 7, 2023
Dielectric film with pressure sensitive microcapsules of adhesion promoter
INTEL CORP0 citations61
US11296186B2Apr 5, 2022
Package-integrated vertical capacitors and methods of assembling same
INTEL CORP0 citations61
US11081448B2Aug 3, 2021
Embedded die microelectronic device with molded component
INTEL CORP1 citations61
US10546916B2Jan 28, 2020
Package-integrated vertical capacitors and methods of assembling same
INTEL CORP1 citations61
US12087700B2Sep 10, 2024
Embedded die microelectronic device with molded component
INTEL CORP0 citations60
US11652071B2May 16, 2023
Electronic device package including a capacitor
INTEL CORP0 citations60
US10923443B2Feb 16, 2021
Electronic device package including a capacitor
INTEL CORP0 citations60
US10985080B2Apr 20, 2021
Electronic package that includes lamination layer
INTEL CORP0 citations59
US11462432B2Oct 4, 2022
Dual side de-bonding in component carriers using photoablation
INTEL CORP0 citations55
US11348865B2May 31, 2022
Electronic device including a substrate having interconnects
INTEL CORP0 citations49
US10068776B1Sep 4, 2018
Raster-planarized substrate interlayers and methods of planarizing same
INTEL CORP1 citations48