Inventor
WU TAIN-SHUN
TW6 patents
Patents
6 patentsUS5637900AJun 10, 1997
Latchup-free fully-protected CMOS on-chip ESD protection circuit
IND TECH RES INST144 citations97
US5850159ADec 15, 1998
High and low speed output buffer with controlled slew rate
IND TECH RES INST63 citations95
US5754380AMay 19, 1998
CMOS output buffer with enhanced high ESD protection capability
IND TECH RES INST79 citations95
US5572394ANov 5, 1996
CMOS on-chip four-LVTSCR ESD protection scheme
IND TECH RES INST63 citations95
US5852315ADec 22, 1998
N-sided polygonal cell layout for multiple cell transistor
IND TECH RES INST73 citations92
US5757242AMay 26, 1998
Low power consumption oscillators with output level shifters
IND TECH RES INST30 citations91