Inventor
CHU FANG-LAN
TW7 patents
Patents
7 patentsUS9276010B2Mar 1, 2016
Dual silicide formation method to embed split gate flash memory in high-k metal gate (HKMG) technology
TAIWAN SEMICONDUCTOR MFG CO LTD12 citations83
US9425206B2Aug 23, 2016
Boundary scheme for embedded poly-SiON CMOS or NVM in HKMG CMOS technology
TAIWAN SEMICONDUCTOR MFG CO LTD4 citations72
US11600618B2Mar 7, 2023
Integrated circuit structure and manufacturing method thereof
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US11069419B2Jul 20, 2021
Test line letter for embedded non-volatile memory technology
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations59
US12381158B2Aug 5, 2025
Wafer bonding method and bonded device structure
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations49
US10163522B2Dec 25, 2018
Test line letter for embedded non-volatile memory technology
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations48
US9983257B2May 29, 2018
Test line patterns in split-gate flash technology
TAIWAN SEMICONDUCTOR MFG CO LTD1 citations48