Inventor
HERZL ROBERT D
US25 patents
⚠️ This page may combine multiple inventors who share the name “HERZL ROBERT D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
17 patentsUS6615167B1Sep 2, 2003
Processor-independent system-on-chip verification for embedded processor systems
IBM100 citations96
US6539522B1Mar 25, 2003
Method of developing re-usable software for efficient verification of system-on-chip integrated circuit designs
IBM90 citations96
US6487699B1Nov 26, 2002
Method of controlling external models in system-on-chip verification
IBM28 citations92
US5269009ADec 7, 1993
Processor system with improved memory transfer means
IBM25 citations89
US5032985AJul 16, 1991
Multiprocessor system with memory fetch buffer invoked during cross-interrogation
IBM45 citations88
US9097765B1Aug 4, 2015
Performance screen ring oscillator formed from multi-dimensional pairings of scan chains
IBM10 citations83
US6868545B1Mar 15, 2005
Method for re-using system-on-chip verification software in an operating system
IBM14 citations82
US7353156B2Apr 1, 2008
Method of switching external models in an automated system-on-chip integrated circuit design verification system
IBM6 citations74
US10006964B2Jun 26, 2018
Chip performance monitoring system and method
IBM2 citations72
US9383766B2Jul 5, 2016
Chip performance monitoring system and method
IBM5 citations72
US9188643B2Nov 17, 2015
Flexible performance screen ring oscillator within a scan chain
IBM4 citations72
US9128151B1Sep 8, 2015
Performance screen ring oscillator formed from paired scan chains
IBM6 citations72
US5361368ANov 1, 1994
Cross interrogate synchronization mechanism including logic means and delay register
IBM9 citations69
US10884943B2Jan 5, 2021
Speculative checkin of ERAT cache entries
IBM0 citations62
US10599569B2Mar 24, 2020
Maintaining consistency between address translations in a data processing system
IBM1 citations62
US7917348B2Mar 29, 2011
Method of switching external models in an automated system-on-chip integrated circuit design verification system
IBM1 citations52
US11221957B2Jan 11, 2022
Promotion of ERAT cache entries
IBM0 citations50
HERZL ROBERT D
4 patentsUS8141028B2Mar 20, 2012
Structure for identifying and implementing flexible logic block logic for easy engineering changes
HERZL ROBERT D4 citations61
US8060845B2Nov 15, 2011
Minimizing impact of design changes for integrated circuit designs
HERZL ROBERT D4 citations61
US8341588B2Dec 25, 2012
Semiconductor layer forming method and structure
HERZL ROBERT D1 citations50
US8181148B2May 15, 2012
Method for identifying and implementing flexible logic block logic for easy engineering changes
HERZL ROBERT D1 citations50