Inventor

GUTWIN PAUL

US19 patents

⚠️ This page may combine multiple inventors who share the name “GUTWIN PAUL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GUTWIN PAUL

TOKYO ELECTRON LTD

Double cross-couple for two-row flip-flop using CFET

Stacked three-dimensional field-effect transistors

Self-aligned method for vertical recess for 3D device integration

Wiring in diffusion breaks in an integrated circuit

Integrated high efficiency transistor cooling

Power-tap pass-through to connect a buried power rail to front-side power distribution network

Multi-tier backside power delivery network for dense gate-on-gate 3D logic

Three-dimensional semiconductor device

Method of 3D logic fabrication to sequentially decrease processing temperature and maintain material thermal thresholds

Three-dimensional memory cell structure

Integrated high efficiency gate on gate cooling

Semiconductor structure having stacked gates and method of manufacture thereof

Inverted cross-couple for top-tier FET for multi-tier gate-on-gate 3DI

Inverted top-tier FET for multi-tier gate-on-gate 3-dimension integration (3Di)

Tapered device for lateral gate all around devices

Inter-level handshake for dense 3D logic integration

Interdigitated device stack

Inter-tier power delivery network (PDN) for dense gate-on-gate 3D logic integration

IBM

System and method for hiding refresh cycles in a dynamic type content addressable memory