Inventor
URITSKY YURI
US7 patents
Patents
7 patentsUS7601648B2Oct 13, 2009
Method for fabricating an integrated gate dielectric layer for field effect transistors
APPLIED MATERIALS INC89 citations94
US5985680ANov 16, 1999
Method and apparatus for transforming a substrate coordinate system into a wafer analysis tool coordinate system
APPLIED MATERIALS INC60 citations94
US6122562ASep 19, 2000
Method and apparatus for selectively marking a semiconductor wafer
APPLIED MATERIALS INC43 citations91
US6051845AApr 18, 2000
Method and apparatus for selectively marking a semiconductor wafer
APPLIED MATERIALS INC28 citations91
US5474640ADec 12, 1995
Apparatus for marking a substrate using ionized gas
APPLIED MATERIALS INC9 citations73
US5870187AFeb 9, 1999
Method for aligning semiconductor wafer surface scans and identifying added and removed particles resulting from wafer handling or processing
APPLIED MATERIALS INC16 citations71
US8569692B1Oct 29, 2013
Measurement system with thickness calculation and method of operation thereof
APPLIED MATERIALS INC0 citations46