Inventor

SUNAGA TOSHIO

JP47 patents

⚠️ This page may combine multiple inventors who share the name “SUNAGA TOSHIO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SUNAGA TOSHIO

IBM

Non-volatile memory device

DRAM system with simultaneous burst read and write

Magnetic memory device

Non-volatile memory device

DRAM with multiple virtual bank architecture for random row access

Data register and access method thereof

Dram array with local latches

Variable bitline precharge voltage sensing technique for DRAM structures

Sensing circuit for semiconductor memory with limited bitline voltage swing

MRAM and access method thereof

Data input/output method

DRAM and data access method for DRAM

Method and device for searching fixed length data

Semiconductor device

Field programmable gate array

Memory cell, memory circuit block, data writing method and data reading method

Dynamic semiconductor memory device and bit line precharge method therefor

Structure and method for gaining fast access to pixel data to store graphic image data in memory

SDRAM and method for data accesses of SDRAM

Non-volatile memory device

Magnetic memory and method for optimizing write current in a magnetic memory

Search memory, memory search controller, and memory search method

Method of controlling memory and memory system thereof

Memory and method of controlling access to memory

Semiconductor storage device

Semiconductor storage device

Dynamic semiconductor storage device

DRAM architecture enabling refresh and access operations in the same bank

Memory and refresh method for memory

Semiconductor storage device having multiple interrupt feature for continuous burst read and write operation

Memory system having reduced powder data refresh

Non-volatile memory device

DRAM and refresh method thereof

Timing circuit and method of changing clock period

Communication control apparatus and method for searching an internet protocol address

Information processing device and method, program, data structure, and computer-readable recording medium

Memory system with low current consumption and method for the same

MRAM array and access method thereof

Method for transferring data bit for DRAM

Low power self refresh timer oscillator

JIANGSU ADVANCED MEMORY TECH CO LTD

Memory device with redundant memory circuit and repair method thereof

Calibration device

Memory device

HITACHI GLOBAL STORAGE TECH

Magnetic head of magnetoresistance effect type and process for production thereof

(unassigned)

Dram cell

SUNAGA TOSHIO

Reference cell architectures for small memory array block activation

PU LEJAN

Replaceable, precise-tracking reference lines for memory products