Inventor

NALLAN PADMAPANI C

US18 patents

⚠️ This page may combine multiple inventors who share the name “NALLAN PADMAPANI C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NALLAN PADMAPANI C

APPLIED MATERIALS INC

Method for dicing a semiconductor wafer

Method for removal of metallic residue after plasma etching of a metal layer

Method for removal of residue from a magneto-resistive random access memory (MRAM) film stack using a sacrificial mask layer

Method of etching magnetic and ferroelectric materials using a pulsed bias source

Method for plasma etching of high-K dielectric materials

Method of preventing short circuits in magnetic film stacks

Method of etching a magnetic material

Method of etching ferroelectric layers

Method of plasma etching high-K dielectric materials with high selectivity to underlying layers

Methods used in fabricating gates in integrated circuit device structures

Plasma etching of silicon using a chlorine chemistry augmented with sulfur dioxide

(unassigned)

Method of patterning a layer of magnetic material

Method for fabricating a gate structure

Method of plasma etching of high-K dielectric materials with high selectivity to underlying layers

Method of fabricating a gate structure of a field effect transistor using an alpha-carbon mask

Method of fabricating a gate structure of a field effect transistor using a hard mask

Method of etching a trench in a silicon-on-insulator (SOI) structure

YING CHENTSAU

Method for removing residue from a magneto-resistive random access memory (MRAM) film stack using a dual mask