Inventor
SHAHEEN MOHAMAD
US6 patents
⚠️ This page may combine multiple inventors who share the name “SHAHEEN MOHAMAD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
5 patentsUS6908027B2Jun 21, 2005
Complete device layer transfer without edge exclusion via direct wafer bonding and constrained bond-strengthening process
INTEL CORP224 citations97
US7161224B2Jan 9, 2007
Complete device layer transfer without edge exclusion via direct wafer bonding and constrained bond-strengthening process
INTEL CORP12 citations82
US7202503B2Apr 10, 2007
III-V and II-VI compounds as template materials for growing germanium containing film on silicon
INTEL CORP11 citations78
US7473614B2Jan 6, 2009
Method for manufacturing a silicon-on-insulator (SOI) wafer with an etch stop layer
INTEL CORP6 citations62
US7378331B2May 27, 2008
Methods of vertically stacking wafers using porous silicon
INTEL CORP5 citations57