Inventor

OOISHI TSUKASA

JP294 patents

⚠️ This page may combine multiple inventors who share the name “OOISHI TSUKASA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

OOISHI TSUKASA

MITSUBISHI ELECTRIC CORP

Memory system for synchronized and high speed data transfer

Semiconductor memory device capable of efficient memory cell select operation with reduced element count

Semiconductor memory device with a voltage down converter stably generating an internal down-converted voltage

Synchronous semiconductor memory device allowing control of operation mode in accordance with operation conditions of a system

Semiconductor memory device with a voltage down converter stably generating an internal down-converted voltage

Dynamic semiconductor memory device of a twisted bit line system having improved reliability of readout

Internal clock generating circuit for clock synchronous semiconductor memory device

Synchronous semiconductor memory device allowing control of operation mode in accordance with operation conditions of a system

Semiconductor device with reduced current consumption in standby state

Synchronous semiconductor memory device allowing control of operation mode in accordance with operation conditions of a system

Semiconductor logic circuit device of low current consumption

Semiconductor integrated circuit device capable of self-analyzing redundancy replacement adapting to capacities of plural memory circuits integrated therein

Delay circuit having low operating environment dependency

Operable synchronous semiconductor memory device switching between single data rate mode and double data rate mode

Semiconductor integrated circuit device including logic gate that attains reduction of power consumption and high-speed operation

Clock reproduction circuit that can reproduce internal clock signal correctly in synchronization with external clock signal

Navigation system for transmitting real-time information allowing instant judgement of next action

Operable synchronous semiconductor memory device switching between single data rate mode and double data rate mode

Semiconductor integrated circuit device including logic gate that attains reduction of power consumption and high-speed operation

Low-power semiconductor memory device

Synchronous semiconductor memory device capable of reducing test cost and method of testing the same

Semiconductor device with reduced current consumption in standby state

Semiconductor device realizing internal operational factor corresponding to an external operational factor stably regardless of fluctuation of external operational factor

Semiconductor device including a fuse circuit in which the electric current is cut off after blowing so as to prevent voltage fall

Synchronous semiconductor memory device allowing easy and fast test

Semiconductor device having hierarchical power supply line structure improved in operating speed

Fast accessible dynamic type semiconductor memory device

Phase-lock loop with independent phase and frequency adjustments

Synchronous semiconductor memory device having improved operational frequency margin at data input/output

Fast accessible semiconductor memory device

Semiconductor circuit device having hierarchical power supply structure

Semiconductor memory device capable of implementing redundancy-based repair efficiently in relation to layout and operating speed and semiconductor integrated circuit device having such semiconductor memory device

Semiconductor memory device including sense amplifier circuit differing in drivability between data write mode and data read mode

Semiconductor device allowing fast sensing with a low power supply voltage

Semiconductor memory device capable of high speed plural parallel test

Synchronous semiconductor memory device allowing easy and fast text

Semiconductor device of hierarchical power source structure

Semiconductor integrated circuit device having a hierarchical power source configuration

Semiconductor device realizing internal operational factor corresponding to an external operational factor stably regardless of fluctuation of the external operational factor

Semiconductor memory device with a voltage down converter stably generating an internal down-converted voltage

Synchronous semiconductor memory device having redundant circuit of high repair efficiency and allowing high speed access

RENESAS TECH CORP

Non-volatile semiconductor memory device allowing shrinking of memory cell

Nonvolatile semiconductor memory device capable of uniformly inputting/outputting data

Nonvolatile semiconductor memory device

Non-volatile semiconductor memory device allowing concurrent data writing and data reading

Semiconductor memory device operating with low current consumption

Semiconductor memory device

Operable synchronous semiconductor memory device switching between single data rate mode and double data rate mode

MITSUBISHI ELECTRIC ENG

Thin film magnetic memory device provided with a dummy cell for data read reference

MITSUBISHIKI DENKI KABUSHIKI K

Clock synchronous semiconductor memory device having a reduced access time