Inventor

REINBERG ALAN R

US124 patents

⚠️ This page may combine multiple inventors who share the name “REINBERG ALAN R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

REINBERG ALAN R

MICRON TECHNOLOGY INC

Methods of forming capacitors and resultant capacitor structures

Vertical sub-micron CMOS transistors on (110), (111), (311), (511), and higher order surfaces of bulk, SOI and thin film structures and method of forming same

Method and apparatus for reducing isolation stress in integrated circuits

Methods of forming capacitors and resultant capacitor structures

Method of making chalcogenide memory device

Methods of making implanted structures

Conductive container structures having a dielectric cap

Material removal method for forming a structure

Dynamic flash memory cells with ultrathin tunnel oxides

Method and apparatus on (110) surfaces of silicon structures with conduction in the &lt;110&gt; direction

Small electrode for a chalcogenide switching device and method for fabricating same

DRAM and SRAM memory cells with repressed memory

Small electrode for a chalcogenide switching device and method for fabricating same

Chalcogenide memory cell with a plurality of chalcogenide electrodes

Method for optimal crystallization to obtain high electrical performance from chalcogenides

Method of making chalogenide memory device

Chalcogenide memory cell with a plurality of chalcogenide electrodes

Dram cell having a stacked capacitor with a tantalum lower plate, a tantalum oxide dielectric layer, and a silicide buried contact

Capacitor structures

Dynamic flash memory cells with ultra thin tunnel oxides

Reduced power DRAM device and method

Dynamic random access memory (DRAM) cells with repressed ferroelectric memory methods of reading same, and apparatuses including same

Method of creating sharp points and other features on the surface of a semiconductor substrate

Method and apparatus on (110) surfaces of silicon structures with conduction in the &lt;110&gt; direction

X-point memory cell

Material removal method for forming a structure

Method and apparatus on (110) surfaces of silicon structures with conduction in the &lt;110&gt; direction

Material removal method for forming a structure

Method of defining at least two different field effect transistor channel lengths using differently angled sidewall segments of a channel defining layer

Methods of forming integrated circuitry, and methods of forming dynamic random access memory circuitry

Electrical and thermal contact for use in semiconductor devices

Method for forming dielectric within a recess

Methods of forming silicon-comprising materials having roughened outer surfaces, and methods of forming capacitor constructions

Microelectronic device fabricating method, integrated circuit, and intermediate construction

Integrated circuit having a void between adjacent conductive lines

Method to provide a void between adjacent conducting lines in a semiconductor device

Masking layer having narrow isolated spacings and the method for forming said masking layer and the method for forming narrow isolated trenches defined by said masking layer

Two piece assembly for the selection of pinouts and bond options on a semiconductor device

Memory in logic cell

Method of forming vertical sub-micron CMOS transistors on (110), (111), (311), (511), and higher order surfaces of bulk, soi and thin film structures

Conductive material patterning methods

Small electrode for a chalcogenide switching device and method for fabricating same

Method and apparatus on (110) surfaces of silicon structures with conduction in the &lt;110&gt; direction

Memory integrated circuitry with DRAMs using LOCOS isolations and areas less than 6F2

Conductive material patterning methods

Electrical and thermal contact for use in semiconductor devices

Reduced mask chalcogenide memory

PERKIN ELMER CORP

Inductively coupled discharge for plasma etching and resist stripping

Apparatus for the etching for semiconductor devices

TEXAS INSTRUMENTS INC

Single component monomer for silicon nitride deposition

Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction

Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction

Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction

Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction