Inventor

PAPATHOMAS KONSTANTINOS I

US74 patents

⚠️ This page may combine multiple inventors who share the name “PAPATHOMAS KONSTANTINOS I”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PAPATHOMAS KONSTANTINOS I

IBM

Method and structure for producing Z-axis interconnection assembly of printed wiring board elements

Method of preparing a printed circuit board

Method for making printed circuit boards with selectivity filled plated through holes

Method of making and interconnect structure

Tamper-responding encapsulated enclosure having flexible protective mesh structure

Tamper-responding encapsulated enclosure having flexible protective mesh structure

Organic controlled collapse chip connector (C4) ball grid array (BGA) chip carrier with dual thermal expansion rates

Composite laminate circuit structure and methods of interconnecting the same

Composite laminate circuit structure and methods of interconnecting the same

Method for filling high aspect ratio via holes in electronic substrates and the resulting holes

Flowable compositions and use in filling vias and plated through-holes

Encapsulant composition and electronic package utilizing same

Laminate circuit structure and method of fabricating

Formation of multisegmented plated through holes

Laminate circuit structure and method of fabricating

Formation of multisegmented plated through holes

Multilayer capacitance structure and circuit board containing the same

Semiconductor device having a thermoset-containing dielectric material and methods for fabricating the same

Solder interconnection

Method of sealing a soldered joint between a semiconductor device and a substrate

Dicyanate prepolymers, use and preparation thereof

Die attachment with reduced adhesive bleed-out

Method and structure for producing Z-axis interconnection assembly of printed wiring board elements

Halogen free triazines, bismaleimide/epoxy polymers, prepregs made therefrom for circuit boards and resin coated articles, and use

Solid via layer to layer interconnect

Flip chip package with improved cap design and process for making thereof

Method of controlling the spread of an adhesive on a circuitized organic substrate

Triazine thin film adhesives

Method for filling high aspect ratio via holes in electronic substrates

Flowable compositions and use in filling vias and plated through-holes

Structure for high speed printed wiring boards with multiple differential impedance-controlled layer

Composite for providing a rigid-flexible circuit board construction and method for fabrication thereof

Lead protective coating composition, process and structure thereof

Encapsulating a solder joint with a photo cured epoxy resin or cyanate

Multilayer capacitance structure and circuit board containing the same and method of forming the same

Printed wiring board structure with z-axis interconnections

Composite for providing a rigid-flexible circuit board construction and method for fabrication thereof

Solid via layer to layer interconnect

Formation of multisegmented plated through holes

Interconnect structure and method of making same

Method and article for filling apertures in a high performance electronic substrate

Hole fill composition and method for filling holes in a substrate

Method of preparing a printed circuit board

High optical contrast resin composition and electronic package utilizing same

High optical contrast resin composition and electronic package utilizing same

Substrate having high optical contrast and method of making same

Triazine polymer and use thereof

Trifunctional cyanate esters, polymers thereof; use and preparation thereof

Trifunctional cyanate esters, polymers thereof; use and preparation thereof

DAS RABINDRA N

Circuitized substrate with low loss capacitive material and method of making same