P

Inventor

EMMA PHILIP GEORGE

US35 patents
⚠️ This page may combine multiple inventors who share the name “EMMA PHILIP GEORGE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

34 patents
US6271542B1Aug 7, 2001

Merged logic and memory combining thin film and bulk Si transistors

IBM119 citations99
US8020073B2Sep 13, 2011

Dynamic memory architecture employing passive expiration of data

IBM99 citations98
US7290203B2Oct 30, 2007

Dynamic memory architecture employing passive expiration of data

IBM101 citations98
US6262885B1Jul 17, 2001

Portable computing device having a display movable thereabout

IBM149 citations98
US5760478AJun 2, 1998

Clock skew minimization system and method for integrated circuits

IBM319 citations98
US6389505B1May 14, 2002

Restore tracking system for DRAM

IBM76 citations96
US6285050B1Sep 4, 2001

Decoupling capacitor structure distributed above an integrated circuit and method for making same

IBM71 citations96
US5692121ANov 25, 1997

Recovery unit for mirrored processors

IBM128 citations95
US6076140AJun 13, 2000

Set associative cache memory system with reduced power consumption

IBM22 citations93
US6021461AFeb 1, 2000

Method for reducing power consumption in a set associative cache memory system

IBM20 citations93
US6946869B2Sep 20, 2005

Method and structure for short range leakage control in pipelined circuits

IBM31 citations92
US6040203AMar 21, 2000

Clock skew minimization and method for integrated circuits

IBM25 citations92
US6038260AMar 14, 2000

Method and apparatus for transposing differential signals onto a set of binary signals to increase the information-carrying capacity of the original set of signals

IBM29 citations92
US6018550AJan 25, 2000

Method and apparatus for transposing differential signals onto a set of binary signals to increase the information-carrying capacity of the original set of signals

IBM26 citations92
US7657726B2Feb 2, 2010

Context look ahead storage structures

IBM12 citations83
US7337271B2Feb 26, 2008

Context look ahead storage structures

IBM10 citations83
US6763432B1Jul 13, 2004

Cache memory system for selectively storing directory information for a higher level cache in portions of a lower level cache

IBM15 citations83
US7945765B2May 17, 2011

Method and structure for asynchronous skip-ahead in synchronous pipelines

IBM14 citations82
US7380047B2May 27, 2008

Apparatus and method for filtering unused sub-blocks in cache memories

IBM17 citations82
US5911153AJun 8, 1999

Memory design which facilitates incremental fetch and store requests off applied base address requests

IBM15 citations82
US7986543B2Jul 26, 2011

Method for achieving very high bandwidth between the levels of a cache hierarchy in 3-dimensional structures, and a 3-dimensional structure resulting therefrom

IBM6 citations74
US6242950B1Jun 5, 2001

Bidirectional data transfer path having increased bandwidth

IBM11 citations73
US6014036AJan 11, 2000

Bidirectional data transfer path having increased bandwidth

IBM11 citations73
US7941728B2May 10, 2011

Method and system for providing an improved store-in cache

IBM2 citations63
US7684224B2Mar 23, 2010

Structure comprising 3-dimensional integrated circuit architecture, circuit structure, and instructions for fabrication thereof

IBM2 citations63
US7402854B2Jul 22, 2008

Three-dimensional cascaded power distribution in a semiconductor device

IBM5 citations62
US6515515B1Feb 4, 2003

Bidirectional data transfer path having increased bandwidth

IBM4 citations62
US6337287B1Jan 8, 2002

High speed, high bandwidth, high density nonvolatile memory system

IBM2 citations62
US6016267AJan 18, 2000

High speed, high bandwidth, high density, nonvolatile memory system

IBM2 citations62
US5734764AMar 31, 1998

Method and apparatus for achieving a fully-connected nonblocking optical crossbar switch having wide transfer paths and minimal latency by exploiting the transparency of silicon at selected wavelengths

IBM4 citations62
US8053819B2Nov 8, 2011

Three-dimensional cascaded power distribution in a semiconductor device

IBM1 citations52
US7616470B2Nov 10, 2009

Method for achieving very high bandwidth between the levels of a cache hierarchy in 3-dimensional structures, and a 3-dimensional structure resulting therefrom

IBM0 citations52
US7158604B1Jan 2, 2007

Method and apparatus for superimposing differential signals onto a set of binary signals to increase the information-carrying capacity of the original set of signals

IBM0 citations52
US6067245AMay 23, 2000

High speed, high bandwidth, high density nonvolatile memory system

IBM0 citations51

EMMA PHILIP GEORGE

1 patent