Inventor

CHERN HORNG-NAN

TW17 patents

⚠️ This page may combine multiple inventors who share the name “CHERN HORNG-NAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHERN HORNG-NAN

UNITED MICROELECTRONICS CORP

Method for forming a borderless contact

Method of manufacturing an alignment mark with an etched back dielectric layer and a transparent dielectric layer and a device region on a higher plane with a wiring layer and an isolation region

Method of avoiding sidewall residue in forming connections

Method of forming DRAM capacitors with a native oxide etch-stop

Method for forming semiconductor dielectric layer

Method of avoiding CMP caused residue on wafer edge uncompleted field

Method for fabricating a hemispherical silicon grain layer

Method of reducing stress between a nitride silicon spacer and a substrate

Semiconductor device and operating method thereof

Method for forming capacitor of memory cell

Method for increasing the effective spacer width

Method for manufacturing lower electrode of DRAM capacitor

Fabricating method of stacked type capacitor

Method of fabricating double-cylinder capacitor

Method of fabricating a wide-based box-structured capacitor containing hemi-spherical grains

POWERCHIP SEMICONDUCTOR CORP

Method of fabricating a MOS device with a localized punchthrough stopper

Process for forming double-layer crown capacitor