Inventor

BULLER JAMES F

US50 patents

⚠️ This page may combine multiple inventors who share the name “BULLER JAMES F”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BULLER JAMES F

ADVANCED MICRO DEVICES INC

Semiconductor device with tensile strain silicon introduced by compressive material in a buried oxide layer

Removable spacer technique

Method for asymmetric spacer formation

Wafer cleaning procedure useful in the manufacture of a non-volatile memory device

Lateral diode with multiple spacers

Strained-silicon devices with different silicon thicknesses

Method of making transistors with gate insulation layers of differing thickness

Composite spacer liner for improved transistor performance

Highly selective, highly uniform plasma etch process for spin-on glass

Method for manufacturing a semiconductor component having an early halo implant

Method for growing dual oxide thickness using nitrided oxides for oxidation suppression

Method for reducing floating body effects in SOI semiconductor device without degrading mobility

Formation of ultra-shallow depth source/drain extensions for MOS transistors

Semiconductor device with transistor-based fuses and related programming method

Method of manufacturing a semiconductor component

Strained-silicon device with different silicon thicknesses

Electrically programmed MOS transistor source/drain series resistance

Method for forming a retrograde impurity profile

Process of fabricating a semiconductor devise having asymmetrically-doped active region and gate electrode

Ring oscillator with embedded scatterometry grate array

Differential implant oxide process

Method of forming source/drain regions in a semiconductor device

Self-aligned VT implant

Self-aligned Vt implant

Distinguishing between dopant and line width variation components

Method of forming transistor devices with different threshold voltages using halo implant shadowing

GLOBALFOUNDRIES INC

Diode with asymmetric silicon germanium anode

Charging protection device

Semiconductor on insulator (SOI) device including a discharge path for a decoupling capacitor

SOI device and method for its fabrication

Transistor with asymmetric silicon germanium source region

Method for fabricating a semiconductor device having an extended stress liner

Semiconductor device and methods for fabricating same

Transistor with asymmetric silicon germanium source region

Metal capacitor design for improved reliability and good electrical connection

Metal capacitor design for improved reliability and good electrical connection

MOS structures with remote contacts and methods for fabricating the same

HARRIS CORP

Bonded wafer processing with oxidative bonding

Bonded wafer processing with metal silicidation

Bonded wafer processing with metal silicidation

Bonded wafer processing

Bonded wafer processing

Bonded wafer processing

SOT CMOS device having differentially doped body extension for providing improved backside leakage channel stop

MATHUR KAVERI

Semiconductor devices with improved local matching and end resistance of RX based resistors

INTERSIL CORP

Bonded wafer with metal silicidation

ZHOU JINGRONG

Charging protection device

SULTAN AKIF

Semiconductor device and methods for fabricating same

LI RUIGANG

Electronic device and method of biasing

ZHU JIANHONG

Integrated circuit system with triode