Inventor

DUESMAN KEVIN G

US113 patents

⚠️ This page may combine multiple inventors who share the name “DUESMAN KEVIN G”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DUESMAN KEVIN G

MICRON TECHNOLOGY INC

Nanotube semiconductor devices and methods for making the same

Annular gate and technique for fabricating an annular gate

Nanotube semiconductor devices and methods for making the same

Surface smoothing of stereolithographically formed 3-D objects

Semiconductor device having ball-bonded pads

Method of making a 3-dimensional programmable antifuse for integrated circuits

Method of making a DRAM capacitor for use as an programmable antifuse for redundancy repair/options on a DRAM

Random access memory device utilizing a vertically oriented select transistor

Methods of fabricating housing structures and micromachines incorporating such structures

Circuit and method for measuring and forcing an internal voltage of an integrated circuit

Dual write cycle programmable conductor memory system and method of operation

Device and method for testing integrated circuit dice in an integrated circuit module

Device and method for testing integrated circuit dice in an integrated circuit module

System and method for an antifuse bank

Utilization of die repattern layers for die internal connections

Semiconductor device having ball-bonded pads

Circuit and method for enabling a function in a multiple memory device module

Device and method for testing integrated circuit dice in an integrated circuit module

System and method for an antifuse bank

Chip decoupling capacitor

Heat sink for chip stacking applications

Printed circuit board with integrated heat sink

Memory module having on-chip surge capacitors

Depletion mode chip decoupling capacitor

Nanotube semiconductor devices and methods for making the same

Surface smoothing of stereolithographically formed 3-D objects

Method and apparatus for fabricating electronic device

Surface smoothing of stereolithographically formed 3-D objects

Stereolithographically packaged, in-process semiconductor die

Method and apparatus for electrolytic plating of surface metals

Method for forming three dimensional structures from liquid with improved surface finish

Utilization of die repattern layers for die internal connections

Method and apparatus for fabricating electronic device

Method and apparatus for rapidly testing memory devices

Integrated chip multiplayer decoupling capacitors

Method and apparatus for fabricating electronic device

Flexible trace surface circuit board and method for making flexible trace surface circuit board

Method and apparatus for rapidly testing memory devices

Memory-cell array and a method for repairing the same

Integrated chip multilayer decoupling capacitors

Method and apparatus for quickly restoring digit I/O lines

Semiconductor devices with package-level configurability

Random access memory device utilizing a vertically oriented select transistor

Device and method for testing integrated circuit dice in an integrated circuit module

Annular gate and technique for fabricating an annular gate

Efficient open-array memory device architecture and method

Integrated circuit module having on-chip surge capacitors

Apparatus and method to reduce undesirable effects caused by a fault in a memory device

Devices and method for testing cell margin of memory devices

MICRON SEMICONDUCTOR INC

Inverting output driver circuit for reducing electron injection into the substrate