Inventor

BEDARIDA LORENZO

IT52 patents

⚠️ This page may combine multiple inventors who share the name “BEDARIDA LORENZO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BEDARIDA LORENZO

ATMEL CORP

Variable charge pump circuit with dynamic load

Flash memory architecture with page mode erase using NMOS and PMOS row decoding scheme

Flexible OTP sector protection architecture for flash memories

System for performing fast testing during flash reference cell setting

High precision digital-to-analog converter with optimized power consumption

High precision digital-to-analog converter with optimized power consumption

Apparatus and method for a configurable mirror fast sense amplifier

Power-on management for voltage down-converter

Modular charge pump architecture

Non-volatile memory array architecture with joined word lines

Fast controlled output buffer

Compensated current offset in a sensing circuit

Fast dynamic low-voltage current mirror with compensated error

Column leakage compensation in a sensing circuit

Sense amplifier with stages to reduce capacitance mismatch in current mirror load

Temperature-compensated current reference circuit

Fast dynamic mirror sense amplifier with separate comparison equalization and evaluation paths

Sense amplifier

System and method for matching resistance in a non-volatile memory

Flexible OTP sector protection architecture for flash memories

Precharge and evaluation phase circuits for sense amplifiers

Method and system for reducing soft-writing in a multi-level flash memory

System and method for preserving an error margin for a non-volatile memory

Fast dynamic low-voltage current mirror with compensated error

Compensated method to implement a high voltage discharge phase after erase pulse in a flash memory device

Fast dynamic low-voltage current mirror with compensated error

Sense amplifier

Method and apparatus for discharging a memory cell in a memory device after an erase operation

Sense amplifier

ST MICROELECTRONICS SRL

Non-volatile memory with functional capability of burst mode read and page mode read during suspension of an operation of electrical alteration

Non-volatile memory with functional capability of simultaneous modification of the content and burst mode read or page mode read

Non-volatile memory with a charge pump with regulated voltage

Architecture for handling internal voltages in a non-volatile memory, particularly in a single-voltage supply type of dual-work flash memory

Control circuit for an output driving stage of an integrated circuit

Circuit for reading a semiconductor memory

Output buffer for a nonvolatile memory with optimized slew-rate control

Non-volatile memory device with burst mode reading and corresponding reading method

Output buffer for a nonvolatile memory with output signal switching noise reduction, and nonvolatile memory comprising the same

Pulse generator independent of supply voltage

Method for reading data from a non-volatile memory device with autodetect burst mode reading and corresponding reading circuit

Nonvolatile memory device having sectors of selectable size and number

Direct-comparison reading circuit for a nonvolatile memory array

Circuit arrangement for the lowering of the threshold voltage of a diode configured transistor

Buffer device with dual supply voltage for low supply voltage applications

Autotesting method of a memory cell matrix, particularly of the non-volatile type

SGS THOMSON MICROELECTRONICS

EEPROM memory device with simultaneous read and write sector capabilities

Nonvolatile memory device having sectors of selectable size and number

STMICROELCTRONICS S R L

Threshold voltage reduction of a transistor connected as a diode

MICROCHIP TECH INC

Memory device, memory address decoder, system, and related method for memory attack detection

BEDARIDA LORENZO

Memory decoder circuit