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Inventor

GERHART DARIN EDWARD

US35 patents
⚠️ This page may combine multiple inventors who share the name “GERHART DARIN EDWARD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WESTERN DIGITAL TECH INC

30 patents
US10642764B1May 5, 2020

Data transfer command latency of a host device

WESTERN DIGITAL TECH INC16 citations85
US10726865B2Jul 28, 2020

Zoned block command to stream command translator

WESTERN DIGITAL TECH INC5 citations83
US11288204B2Mar 29, 2022

Logical and physical address field size reduction by alignment-constrained writing technique

WESTERN DIGITAL TECH INC2 citations72
US10922242B2Feb 16, 2021

Adaptable logical to physical tables for multiple sector pattern support

WESTERN DIGITAL TECH INC2 citations72
US10379747B2Aug 13, 2019

Automated latency monitoring

WESTERN DIGITAL TECH INC3 citations71
US10025664B2Jul 17, 2018

Selective buffer protection

WESTERN DIGITAL TECH INC4 citations70
US11615805B2Mar 28, 2023

Zoned block command to stream command translator

WESTERN DIGITAL TECH INC0 citations62
US11422722B2Aug 23, 2022

Intelligent wide port PHY usage

WESTERN DIGITAL TECH INC0 citations62
US11195548B2Dec 7, 2021

Zoned block command to stream command translator

WESTERN DIGITAL TECH INC0 citations62
US11126357B2Sep 21, 2021

Intelligent SAS phy connection management

WESTERN DIGITAL TECH INC0 citations62
US10949096B2Mar 16, 2021

Method using logical based addressing for latency reduction

WESTERN DIGITAL TECH INC0 citations62
US10922160B2Feb 16, 2021

Managing phys of a data storage target device background of the disclosure

WESTERN DIGITAL TECH INC0 citations62
US10466911B2Nov 5, 2019

Method using logical based addressing for latency reduction

WESTERN DIGITAL TECH INC1 citations62
US10425333B2Sep 24, 2019

Managing phys of a data storage target device

WESTERN DIGITAL TECH INC1 citations62
US10423525B2Sep 24, 2019

Automatic performance tuning for memory arrangements

WESTERN DIGITAL TECH INC1 citations62
US11416417B2Aug 16, 2022

Method and apparatus to generate zero content over garbage data when encryption parameters are changed

WESTERN DIGITAL TECH INC0 citations61
US11086989B2Aug 10, 2021

Smart device security compromised warning apparatus and method

WESTERN DIGITAL TECH INC0 citations52
US10785154B2Sep 22, 2020

Managing phys of a data storage target device

WESTERN DIGITAL TECH INC0 citations52
US10565041B2Feb 18, 2020

Managing phys of a data storage target device

WESTERN DIGITAL TECH INC0 citations52
US10725931B2Jul 28, 2020

Logical and physical address field size reduction by alignment-constrained writing technique

WESTERN DIGITAL TECH INC0 citations51
US10725683B2Jul 28, 2020

Intelligent wide port phy usage

WESTERN DIGITAL TECH INC0 citations51
US10698840B2Jun 30, 2020

Method and apparatus to generate zero content over garbage data when encryption parameters are changed

WESTERN DIGITAL TECH INC0 citations51
US10642519B2May 5, 2020

Intelligent SAS phy connection management

WESTERN DIGITAL TECH INC0 citations51
US10042585B2Aug 7, 2018

Pervasive drive operating statistics on SAS drives

WESTERN DIGITAL TECH INC1 citations51
US9959218B2May 1, 2018

Method and apparatus to generate zero content over garbage data when encryption parameters are changed

WESTERN DIGITAL TECH INC0 citations51
US9959068B2May 1, 2018

Intelligent wide port phy usage

WESTERN DIGITAL TECH INC0 citations51
US10635154B2Apr 28, 2020

Intelligent SAS phy power management

WESTERN DIGITAL TECH INC0 citations50
US9927999B1Mar 27, 2018

Trim management in solid state drives

WESTERN DIGITAL TECH INC0 citations49
US10649909B2May 12, 2020

Logical block addressing range collision crawler

WESTERN DIGITAL TECH INC0 citations41
US10372627B2Aug 6, 2019

Method to generate pattern data over garbage data when encryption parameters are changed

WESTERN DIGITAL TECH INC0 citations40

HGST Netherlands BV

3 patents

IBM

2 patents