Inventor

FARRAR PAUL A

US199 patents

⚠️ This page may combine multiple inventors who share the name “FARRAR PAUL A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FARRAR PAUL A

MICRON TECHNOLOGY INC

Metal-substituted transistor gates

Buried conductors

Multiple chip stack structure and cooling system

Microelectronic device package with conductive elements and associated method of manufacture

Die to die connection method and assemblies and packages including dice so connected

Dynamic flash memory cells with ultrathin tunnel oxides

Method of forming foamed polymeric material for an integrated circuit

Method for making high-Q inductive elements

Method of forming a support structure for air bridge wiring of an integrated circuit

Assemblies and packages including die-to-die connections

Method of alignment for buried structures formed by surface transformation of empty spaces in solid state materials

Dynamic flash memory cells with ultra thin tunnel oxides

Reduced power DRAM device and method

Method and support structure for air bridge wiring of an integrated circuit

Distributed semiconductor device methods, apparatus, and systems

Strained semiconductor, devices and systems and methods of formation

In-service reconfigurable DRAM and flash memory device

Die to die connection method and assemblies and packages including dice so connected

Low dielectric constant shallow trench isolation

Multi-chip electronic package and cooling system

Microelectronic device package filled with liquid or pressurized gas and associated method of manufacture

Angled edge connections for multichip structures

Copper metallurgy in integrated circuits

Three terminal magnetic random access memory

Damascene structure and method of making

Three-dimensional multichip module

Method of fabricating a barrier layer associated with a conductor layer in damascene structures

Structures and methods to enhance copper metallization

Method of forming buried conductor patterns by surface transformation of empty spaces in solid state materials

Process for providing seed layers for using aluminum, copper, gold and silver metallurgy process for providing seed layers for using aluminum, copper, gold and silver metallurgy

Integrated circuit with oxidation-resistant polymeric layer

Copper metallurgy in integrated circuits

Forming submicron integrated-circuit wiring from gold, silver, copper, and other metals

Forming submicron integrated-circuit wiring from gold, silver, copper and other metals

Method of forming a micro solder ball for use in C4 bonding process

Methods and structures for gold interconnections in integrated circuits

Semiconductor devices

High density chip packages, methods of forming, and systems including same

Structures and methods to enhance copper metallization

Electronic apparatus having a core conductive structure within an insulating layer

Three-dimensional multichip module

Integrated circuit and seed layers

Structures and methods to enhance copper metallization

Controlling diffusion in doped semiconductor regions

Method for controlling diffusion in semiconductor regions

Selective deposition of solder ball contacts

IBM

Method for forming dense multilevel interconnection metallurgy for semiconductor devices

Method and apparatus for a stress relieved electronic module

High density memory module

(unassigned)

Low dielectric constant shallow trench isolation