Inventor

MIYANO SHINJI

JP49 patents

⚠️ This page may combine multiple inventors who share the name “MIYANO SHINJI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MIYANO SHINJI

TOSHIBA KK

Memory-embedded LSI

Semiconductor memory device with multiplied internal clock

Semiconductor device realized by using partial SOI technology

One-chip LSI including a general memory and a logic

Semiconductor device having one of patterned SOI and SON structure

Memory integrated with logic on a semiconductor chip and method of designing the same

Semiconductor memory device

Semiconductor memory circuit having data buses common to a plurality of memory cell arrays

Semiconductor memory device having a column selector

Semiconductor memory device

Arithmetic device

Semiconductor device and method of controlling electrostatic actuator

Semiconductor memory device having data holding mode using ECC function

Semiconductor memory device having data holding mode using ECC function

Synchronous semiconductor storage device having error correction function

Semiconductor memory device with test circuit

Memory-embedded semiconductor integrated circuit device and method for testing same

Dynamic random access memory capable of simultaneously writing identical data to memory cells

Semiconductor device realized by using partial SOI technology

Semiconductor integrated circuit device and its manufacturing method

Semiconductor memory device having a delay circuit set according to the storage capacity of a memory macro

Semiconductor integrated circuit device and its manufacturing method

Clock synchronous type DRAM with latch

Semiconductor memory device

Memory standard cell macro for semiconductor device

Clock synchronous type DRAM with data latch

Semiconductor memory device with a decoding peripheral circuit for improving the operation frequency

Semiconductor memory device

Field effect transistor with channel formed on homojunction interface

Semiconductor storage device having TFET access transistors and method of driving the same

Semiconductor memory device having a mode in which a plurality of data are simultaneously read out of memory cells of one row and different columns

Memory circuit with built-in cache memory

Transistors with source and word line voltage adjusting circuitry for controlling leakage currents and its method thereof

Semiconductor device realized by using partial SOI technology

Semiconductor memory device and method for driving the same

TOSHIBA MEMORY CORP

Magnetic memory device

Magnetic memory device

Magnetic memory device

Magnetic memory device

Magnetic storage device

Magnetic memory device

Magnetic memory device including magnetic portions nonmagnetic layers

Magnetic memory device

Magnetic memory

KIOXIA CORP

Magnetic storage device

Semiconductor storage device

Semiconductor memory device

IWAI TAKAYUKI

Semiconductor memory device

MIYANO SHINJI

Semiconductor device and method of controlling electrostatic actuator