Inventor
CARNEVALE MICHAEL JOSEPH
US16 patents
Patents
16 patentsUS6353910B1Mar 5, 2002
Method and apparatus for implementing error correction coding (ECC) in a dynamic random access memory utilizing vertical ECC storage
IBM89 citations98
US7225364B2May 29, 2007
Method and apparatus for implementing infiniband receive function
IBM58 citations96
US5721874AFeb 24, 1998
Configurable cache with variable, dynamically addressable line sizes
IBM64 citations96
US5687337ANov 11, 1997
Mixed-endian computer system
IBM54 citations95
US7480197B2Jan 20, 2009
Implementing calibration of DQS sampling during synchronous DRAM reads
IBM26 citations92
US7133943B2Nov 7, 2006
Method and apparatus for implementing receive queue for packet-based communications
IBM35 citations92
US6430648B1Aug 6, 2002
Arranging address space to access multiple memory banks
IBM23 citations92
US7783957B2Aug 24, 2010
Apparatus for implementing enhanced vertical ECC storage in a dynamic random access memory
IBM16 citations91
US7451380B2Nov 11, 2008
Method for implementing enhanced vertical ECC storage in a dynamic random access memory
IBM16 citations91
US7558132B2Jul 7, 2009
Implementing calibration of DQS sampling during synchronous DRAM reads
IBM11 citations84
US7266083B2Sep 4, 2007
Method and apparatus for implementing queue pair connection protection over infiniband
IBM18 citations84
US7024613B2Apr 4, 2006
Method and apparatus for implementing infiniband transmit queue
IBM13 citations84
US6909315B2Jun 21, 2005
Data strobe signals (DQS) for high speed dynamic random access memories (DRAMs)
IBM11 citations74
US7212547B2May 1, 2007
Method and apparatus for implementing global to local queue pair translation
IBM2 citations62
US7512143B2Mar 31, 2009
Buffer management for a target channel adapter
IBM0 citations41
US7975064B2Jul 5, 2011
Envelope packet architecture for broadband engine
IBM0 citations39