Inventor
LAVOIE ADRIEN R
US28 patents
⚠️ This page may combine multiple inventors who share the name “LAVOIE ADRIEN R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
19 patentsUS7682891B2Mar 23, 2010
Tunable gate electrode work function material for transistor applications
INTEL CORP19 citations92
US7687911B2Mar 30, 2010
Silicon-alloy based barrier layers for integrated circuit metal interconnects
INTEL CORP8 citations84
US7605073B2Oct 20, 2009
Sealants for metal interconnect protection in microelectronic devices having air gap interconnect structures
INTEL CORP9 citations83
US7354849B2Apr 8, 2008
Catalytically enhanced atomic layer deposition process
INTEL CORP13 citations83
US7365011B2Apr 29, 2008
Catalytic nucleation monolayer for metal seed layers
INTEL CORP12 citations80
US8013401B2Sep 6, 2011
Selectively depositing aluminum in a replacement metal gate process
INTEL CORP4 citations63
US7625817B2Dec 1, 2009
Method of fabricating a carbon nanotube interconnect structures
INTEL CORP4 citations63
US7858525B2Dec 28, 2010
Fluorine-free precursors and methods for the deposition of conformal conductive films for nanointerconnect seed and fill
INTEL CORP5 citations62
US7749906B2Jul 6, 2010
Using unstable nitrides to form semiconductor structures
INTEL CORP3 citations62
US7550385B2Jun 23, 2009
Amine-free deposition of metal-nitride films
INTEL CORP6 citations62
US7476615B2Jan 13, 2009
Deposition process for iodine-doped ruthenium barrier layers
INTEL CORP3 citations62
US7524765B2Apr 28, 2009
Direct tailoring of the composition and density of ALD films
INTEL CORP2 citations57
US7799679B2Sep 21, 2010
Liquid phase molecular self-assembly for barrier deposition and structures formed thereby
INTEL CORP0 citations52
US8344352B2Jan 1, 2013
Using unstable nitrides to form semiconductor structures
INTEL CORP0 citations51
US8012878B2Sep 6, 2011
Atomic layer volatilization process for metal layers
INTEL CORP0 citations51
US7982204B2Jul 19, 2011
Using unstable nitrides to form semiconductor structures
INTEL CORP0 citations51
US7842983B2Nov 30, 2010
Boundaries with elevated deuterium levels
INTEL CORP0 citations51
US7759241B2Jul 20, 2010
Group II element alloys for protecting metal interconnects
INTEL CORP1 citations51
US7704895B2Apr 27, 2010
Deposition method for high-k dielectric materials
INTEL CORP1 citations51
LAVOIE ADRIEN R
6 patentsUS8252680B2Aug 28, 2012
Methods and architectures for bottomless interconnect vias
LAVOIE ADRIEN R23 citations92
US8319287B2Nov 27, 2012
Tunable gate electrode work function material for transistor applications
LAVOIE ADRIEN R7 citations83
US8304909B2Nov 6, 2012
IC solder reflow method and materials
LAVOIE ADRIEN R5 citations62
US7566661B2Jul 28, 2009
Electroless treatment of noble metal barrier and adhesion layer
LAVOIE ADRIEN R6 citations62
US8394694B2Mar 12, 2013
Reliability of high-K gate dielectric layers
LAVOIE ADRIEN R3 citations61
US8222746B2Jul 17, 2012
Noble metal barrier layers
LAVOIE ADRIEN R5 citations61