Inventor
PALERMO ROBERT J
US10 patents
⚠️ This page may combine multiple inventors who share the name “PALERMO ROBERT J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CADENCE DESIGN SYSTEMS INC
5 patentsUS6457159B1Sep 24, 2002
Functional timing analysis for characterization of virtual component blocks
CADENCE DESIGN SYSTEMS INC30 citations91
US6442739B1Aug 27, 2002
System and method for timing abstraction of digital logic circuits
CADENCE DESIGN SYSTEMS INC42 citations90
US7647220B2Jan 12, 2010
Transistor-level timing analysis using embedded simulation
CADENCE DESIGN SYSTEMS INC10 citations83
US6760894B1Jul 6, 2004
Method and mechanism for performing improved timing analysis on virtual component blocks
CADENCE DESIGN SYSTEMS INC16 citations82
US6877143B1Apr 5, 2005
System and method for timing abstraction of digital logic circuits
CADENCE DESIGN SYSTEMS INC6 citations71
UNISYS CORP
3 patentsUS5724250AMar 3, 1998
Method and apparatus for performing drive strength adjust optimization in a circuit design
UNISYS CORP65 citations95
US5761097AJun 2, 1998
Logic timing analysis for multiple-clock designs
UNISYS CORP27 citations92
US5831869ANov 3, 1998
Method of compacting data representations of hierarchical logic designs used for static timing analysis
UNISYS CORP67 citations90