Inventor

JANSSEN GEERT

US25 patents

⚠️ This page may combine multiple inventors who share the name “JANSSEN GEERT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JANSSEN GEERT

IBM

Method and system for equivalence-checking combinatorial circuits using interative binary-decision-diagram sweeping and structural satisfiability analysis

Method and system for parametric reduction of sequential designs

Method for preserving constraints during sequential reparameterization

Framework for multiple-engine based verification tools for integrated circuits

Reversing the effects of sequential reparameterization on traces

Method for improved synthesis of binary decision diagrams with inverted edges and quantifiable as well as nonquantifiable variables

Method for improved synthesis of binary decision diagrams with inverted edges and quantifiable as well as nonquantifiable variables

Parametric reduction of sequential design

Method for heuristic preservation of critical inputs during sequential reparameterization

Method for improved synthesis of binary decision diagrams with inverted edges and quantifiable as well as nonquantifiable variables

Method and system for reversing the effects of sequential reparameterization on traces

System and method to reduce human activity damage-induced power outage

Method and system for building binary decision diagrams efficiently in a structural network representation of a digital circuit

Method and system for reversing the effects of sequential reparameterization on traces

Method for heuristic preservation of critical inputs during sequential reparameterization

Method and system for case-splitting on nodes in a symbolic simulation framework

Method and system for case-splitting on nodes in a symbolic simulation framework

System for building binary decision diagrams efficiently in a structural network representation of a digital circuit

Building binary decision diagrams efficiently in a structural network representation of a digital circuit

Method and system for case-splitting on nodes in a symbolic simulation framework

Scalable dependent state element identification

BAUMGARTNER JASON R

Method and system for design simplification through implication-based analysis

Method for scalable derivation of an implication-based reachable state set overapproximation

Automated convergence of ternary simulation by saturation of deep gates

BAUMGARTNER JASON

Optimizing a netlist circuit representation by leveraging binary decision diagrams to perform rewriting