P

Inventor

LIMAYE DEEPAK

US10 patents
⚠️ This page may combine multiple inventors who share the name “LIMAYE DEEPAK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

4 patents
US9535860B2Jan 3, 2017

Arbitrating memory accesses via a shared memory fabric

INTEL CORP2 citations72
US9767026B2Sep 19, 2017

Providing snoop filtering associated with a data buffer

INTEL CORP6 citations70
US7424576B2Sep 9, 2008

Parallel cachelets

INTEL CORP0 citations50
US7216201B2May 8, 2007

Parallel cachelets

INTEL CORP0 citations50

APPLE INC

3 patents
US11099990B2Aug 24, 2021

Managing serial miss requests for load operations in a non-coherent memory system

APPLE INC2 citations71
US11893413B2Feb 6, 2024

Virtual channel support using write table

APPLE INC0 citations61
US11347514B2May 31, 2022

Content-addressable memory filtering based on microarchitectural state

APPLE INC0 citations50

LIMAYE DEEPAK

2 patents
US8966230B2Feb 24, 2015

Dynamic selection of execution stage

LIMAYE DEEPAK0 citations45
US8065501B2Nov 22, 2011

Indexing a translation lookaside buffer (TLB)

LIMAYE DEEPAK0 citations45

ROBINSON STEPHEN J

1 patent
US8533721B2Sep 10, 2013

Method and system of scheduling out-of-order operations without the requirement to execute compare, ready and pick logic in a single cycle

ROBINSON STEPHEN J0 citations32