Inventor

RAJAN SURESH NATARAJAN

US65 patents

⚠️ This page may combine multiple inventors who share the name “RAJAN SURESH NATARAJAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RAJAN SURESH NATARAJAN

RAJAN SURESH NATARAJAN

Multi-rank partial width memory modules

Simulating a memory standard

Simulating a memory standard

Performing power management operations

Simulating a refresh operation latency

Memory apparatus operable to perform a power-saving operation

Memory module with memory stack and interface with enhanced capabilities

Multi-rank partial width memory modules

Power management of memory circuits by virtual memory simulation

Memory circuit simulation with power saving capabilities

Configurable memory system with interface circuit

Memory circuit simulation system and method with refresh capabilities

Memory circuit system and method

Memory circuit system and method

Performing power management operations

Delaying a signal communicated from a system to at least one of a plurality of memory circuits

Apparatus and method for power management of memory circuits by a system or component thereof

Apparatus for simulating an aspect of a memory circuit

System and method for simulating an aspect of a memory circuit

Memory circuit system and method

Performing error detection on DRAMs

Memory system including multiple memory stacks

GOOGLE INC

Memory apparatus operable to perform a power-saving operation

Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit

Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits

System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits

Multi-rank partial width memory modules

Memory systems and memory modules

Simulating a different number of memory circuit devices

Memory device with emulated characteristics

Configurable memory circuit system and method

Stacked DIMM memory interface

METARAM INC

System and method for simulating an aspect of a memory circuit

System and method for power management in memory systems

Interface circuit system and method for performing power saving operations during a command-related latency

Interface circuit system and method for performing power management operations utilizing power management signals

Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits

Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit

Power saving system and method for use with a plurality of memory circuits

SMITH MICHAEL JOHN SEBASTIAN

Memory systems and memory modules

Emulation of abstracted DIMMS using abstracted DRAMS

Memory modules with reliability and serviceability functions

Adjusting the timing of signals associated with a memory system

WANG MIN

Optimal channel design for memory devices for providing a high-speed memory interface

Optimal channel design for memory devices for providing a high-speed memory interface

Optimal channel design for memory devices for providing a high-speed memory interface

SCHAKEL KEITH R

Memory refresh apparatus and method

Refresh management of memory modules

Memory refresh apparatus and method

SMITH MICHAEL JOHN

Adjusting the timing of signals associated with a memory system