Inventor
DUNTON SAMUEL V
US15 patents
⚠️ This page may combine multiple inventors who share the name “DUNTON SAMUEL V”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SANDISK 3D LLC
8 patentsUS7238607B2Jul 3, 2007
Method to minimize formation of recess at surface planarized by chemical mechanical planarization
SANDISK 3D LLC162 citations98
US7575984B2Aug 18, 2009
Conductive hard mask to protect patterned features during trench etch
SANDISK 3D LLC111 citations97
US7307013B2Dec 11, 2007
Nonselective unpatterned etchback to expose buried patterned features
SANDISK 3D LLC67 citations97
US7422985B2Sep 9, 2008
Method for reducing dielectric overetch using a dielectric etch stop at a planar surface
SANDISK 3D LLC16 citations92
US8008187B2Aug 30, 2011
Method for reducing dielectric overetch using a dielectric etch stop at a planar surface
SANDISK 3D LLC7 citations84
US7790607B2Sep 7, 2010
Method for reducing dielectric overetch using a dielectric etch stop at a planar surface
SANDISK 3D LLC1 citations63
US8722518B2May 13, 2014
Methods for protecting patterned features during trench etch
SANDISK 3D LLC0 citations52
US7300876B2Nov 27, 2007
Method for cleaning slurry particles from a surface polished by chemical mechanical polishing
SANDISK 3D LLC0 citations52
LSI LOGIC CORP
4 patentsUS6319836B1Nov 20, 2001
Planarization system
LSI LOGIC CORP9 citations73
US6727107B1Apr 27, 2004
Method of testing the processing of a semiconductor wafer on a CMP apparatus
LSI LOGIC CORP8 citations66
US6586326B2Jul 1, 2003
Metal planarization system
LSI LOGIC CORP3 citations62
US6951808B2Oct 4, 2005
Metal planarization system
LSI LOGIC CORP1 citations51