Inventor

JEDDELOH JOE M

US73 patents

⚠️ This page may combine multiple inventors who share the name “JEDDELOH JOE M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JEDDELOH JOE M

MICRON TECHNOLOGY INC

Multi-serial interface stacked-die memory architecture

Memory device interface methods, apparatus, and systems

Stacked memory devices, systems, and methods

Systems and methods for monitoring a memory system

Configurable bandwidth memory devices and methods

Variable memory refresh devices and methods

Embedded processor

Stacked device remapping and repair

Flexible memory system with a controller and a stack of memory

Memory devices and methods for managing error regions

Flexible memory system with a controller and a stack of memory

Memory devices and methods for managing error regions

Switched interface stacked-die memory architecture

Flexible memory system with a controller and a stack of memory

Stacked-die memory systems and methods for training stacked-die memory systems

Multi-serial interface stacked-die memory architecture

Memory device interface methods, apparatus, and systems

Memory devices and methods for managing error regions

Interface device accessing a stack of memory dice and a solid state disk

Error correction in a stacked memory

Stacked device remapping and repair

Memory device interface methods, apparatus, and systems

Memory prefetch systems and methods

Flexible memory system with a controller and a stack of memory

JEDDELOH JOE M

Memory devices and methods for managing error regions

Variable memory refresh devices and methods

Interface device for memory in a stack, storage devices and a processor

Error correction in a stacked memory

Switched interface stacked-die memory architecture

Memory device interface methods, apparatus, and systems

Memory device with network on chip methods, apparatus, and systems

Apparatuses and methods for memory testing and repair

Memory device power managers and methods

Multi-serial interface stacked-die memory architecture

Stacked-die memory systems and methods for training stacked-die memory systems

Switched interface stacked-die memory architecture

Systems and methods for monitoring a memory system

Memory devices and methods for managing error regions

Memory device interface methods, apparatus, and systems

Data transfer management

Configurable bandwidth memory devices and methods

Variable memory refresh devices and methods

Embedded processor

MICRON ELECTRONICS INC

Interface for high speed memory

Method and system for concurrent computer transaction processing

Method and system for concurrent computer transaction processing

Interface for high speed memory

Method and system for concurrent computer transaction processing

KEETH BRENT

Stacked device remapping and repair

Stacked device remapping and repair