Inventor

GAIDIS MICHAEL C

US60 patents

⚠️ This page may combine multiple inventors who share the name “GAIDIS MICHAEL C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GAIDIS MICHAEL C

IBM

Maskless array protection process flow for forming interconnect vias in magnetic random access memory devices

High density planar magnetic domain wall memory apparatus

Sidewall coating for non-uniform spin momentum-transfer magnetic tunnel junction current flow

Structure for stochastic integrated circuit personalization

Method of forming high density planar magnetic domain wall memory

Utilizing sidewall spacer features to form magnetic tunnel junctions in an integrated circuit

Method for improved alignment of magnetic tunnel junction elements

Spin transfer torque cell for magnetic random access memory

Thermally assisted MRAM with a multilayer encapsulant for low thermal conductivity

High density planar magnetic domain wall memory apparatus

Method and structure for forming slot via bitline for MRAM devices

Magnetic devices and techniques for formation thereof

Planar magnetic tunnel junction substrate having recessed alignment marks

BiLevel metallization for embedded back end of the line structures

Linear MRAM device with a self-aligned bottom contact

Magnetic domain wall shift register memory device readout

Magnetic domain wall shift register memory device readout

Hard mask structure for patterning of materials

Hard mask structure for patterning of materials

Method and structure for generating offset fields for use in MRAM devices

Spin transfer torque cell for magnetic random access memory

Multiple bit nonvolatile memory based on current induced domain wall motion in a nanowire magnetic tunnel junction

Multiple bit nonvolatile memory based on current induced domain wall motion in a nanowire magnetic tunnel junction

Self-aligned mask to reduce cell layout area

Method of forming an on-pitch self-aligned hard mask for contact to a tunnel junction using ion beam etching

Linear MRAM device with a self-aligned bottom contact

Injection pillar definition for line MRAM by a self-aligned sidewall transfer

Method for fabricating magnetic field concentrators as liners around conductive wires in microelectronic devices

Thermally assisted MRAM with a multilayer encapsulant for low thermal conductivity

Spin transfer torque cell for magnetic random access memory

Method for forming slot via bitline for MRAM devices

Method of forming vertical contacts in integrated circuits

Method and apparatus for bitline and contact via integration in magnetic random access memory arrays

Method and apparatus for fabricating sub-lithography data tracks for use in magnetic shift register memory devices

Structure and method for stochastic integrated circuit personalization

Method and structure for generating offset fields for use in MRAM devices

Ferromagnetic liner for conductive lines of magnetic memory cells

GAIDIS MICHAEL C

Spin transfer torque cell for magnetic random access memory

Tunnel junction via

Tunnel junction via

Sidewall coating for non-uniform spin momentum-transfer magnetic tunnel junction current flow

Template-registered diblock copolymer mask for MRAM device formation

Spin-torque based memory device with read and write current paths modulated with a non-linear shunt resistor

INFINEON TECHNOLOGIES AG

Method of patterning a magnetic tunnel junction stack for a magneto-resistive random access memory

Recessed metal lines for protective enclosure in integrated circuits

ASSEFA SOLOMON

Pillar-based interconnects for magnetoresistive random access memory

Pillar-based interconnects for magnetoresistive random access memory

ABRAHAM DAVID W

Magnetic random access memory with synthetic antiferromagnetic storage layers and non-pinned reference layers

Method for fabricating synthetic antiferromagnetic (SAF) device

ANNUNZIATA ANTHONY J

Magnetic tunnel junction self-alignment in magnetic domain wall shift register memory devices