Inventor
FARQUHAR DONALD S
US52 patents
⚠️ This page may combine multiple inventors who share the name “FARQUHAR DONALD S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
49 patentsUS7301108B2Nov 27, 2007
Multi-layered interconnect structure using liquid crystalline polymer dielectric
IBM105 citations99
US6465084B1Oct 15, 2002
Method and structure for producing Z-axis interconnection assembly of printed wiring board elements
IBM116 citations99
US6931726B2Aug 23, 2005
Method of making and interconnect structure
IBM91 citations98
US6929900B2Aug 16, 2005
Tamper-responding encapsulated enclosure having flexible protective mesh structure
IBM127 citations98
US6600224B1Jul 29, 2003
Thin film attachment to laminate using a dendritic interconnection
IBM83 citations98
US6686539B2Feb 3, 2004
Tamper-responding encapsulated enclosure having flexible protective mesh structure
IBM109 citations97
US6373717B1Apr 16, 2002
Electronic package with high density interconnect layer
IBM97 citations97
US6826830B2Dec 7, 2004
Multi-layered interconnect structure using liquid crystalline polymer dielectric
IBM42 citations96
US6764748B1Jul 20, 2004
Z-interconnections with liquid crystal polymer dielectric films
IBM48 citations96
US6639155B1Oct 28, 2003
High performance packaging platform and method of making same
IBM62 citations96
US6638607B1Oct 28, 2003
Method and structure for producing Z-axis interconnection assembly of printed wiring board elements
IBM40 citations94
US6700078B2Mar 2, 2004
Formation of multisegmented plated through holes
IBM17 citations93
US6426470B1Jul 30, 2002
Formation of multisegmented plated through holes
IBM23 citations93
US6254972B1Jul 3, 2001
Semiconductor device having a thermoset-containing dielectric material and methods for fabricating the same
IBM29 citations93
US6829823B2Dec 14, 2004
Method of making a multi-layered interconnect structure
IBM31 citations92
US6645607B2Nov 11, 2003
Method and structure for producing Z-axis interconnection assembly of printed wiring board elements
IBM24 citations92
US6504111B2Jan 7, 2003
Solid via layer to layer interconnect
IBM29 citations92
US6501171B2Dec 31, 2002
Flip chip package with improved cap design and process for making thereof
IBM24 citations92
US6125531AOct 3, 2000
Method of making a printed circuit board having filled holes and a fill member for use therewith including reinforcement means
IBM16 citations91
US6079100AJun 27, 2000
Method of making a printed circuit board having filled holes and fill member for use therewith
IBM48 citations91
US5925206AJul 20, 1999
Practical method to make blind vias in circuit boards and other substrates
IBM63 citations91
US6399896B1Jun 4, 2002
Circuit package having low modulus, conformal mounting pads
IBM51 citations90
US7679921B2Mar 16, 2010
Security cloth design and assembly
IBM18 citations89
US6982642B1Jan 3, 2006
Security cloth design and assembly
IBM34 citations89
US7007171B1Feb 28, 2006
Method and apparatus for improved fold retention on a security enclosure
IBM32 citations86
US7059049B2Jun 13, 2006
Electronic package with optimized lamination process
IBM15 citations82
US6675852B2Jan 13, 2004
Platen for use in laminating press
IBM14 citations81
US6395998B1May 28, 2002
Electronic package having an adhesive retaining cavity
IBM18 citations81
US7777136B2Aug 17, 2010
Multi-layered interconnect structure using liquid crystalline polymer dielectric
IBM5 citations74
US7076869B2Jul 18, 2006
Solid via layer to layer interconnect
IBM10 citations74
US6996903B2Feb 14, 2006
Formation of multisegmented plated through holes
IBM7 citations74
US6967705B2Nov 22, 2005
Lamination of liquid crystal polymer dielectric films
IBM6 citations74
US6660945B2Dec 9, 2003
Interconnect structure and method of making same
IBM9 citations74
US6599833B2Jul 29, 2003
Method and article for filling apertures in a high performance electronic substrate
IBM8 citations74
US6589639B2Jul 8, 2003
Hole fill composition and method for filling holes in a substrate
IBM11 citations74
US6187417B1Feb 13, 2001
Substrate having high optical contrast and method of making same
IBM12 citations74
US6634543B2Oct 21, 2003
Method of forming metallic z-interconnects for laminate chip packages and boards
IBM7 citations73
US6969436B2Nov 29, 2005
Method and structure for producing Z-axis interconnection assembly of printed wiring board elements
IBM6 citations72
US6335495B1Jan 1, 2002
Patterning a layered chrome-copper structure disposed on a dielectric substrate
IBM11 citations72
US7981245B2Jul 19, 2011
Multi-layered interconnect structure using liquid crystalline polymer dielectric
IBM4 citations63
US7402254B2Jul 22, 2008
Method and structure for producing Z-axis interconnection assembly of printed wiring board elements
IBM4 citations63
US7014731B2Mar 21, 2006
Semiconductor device having a thermoset-containing dielectric material and methods for fabricating the same
IBM2 citations63
US6819373B2Nov 16, 2004
Lamination of liquid crystal polymer dielectric films
IBM2 citations63
US6534160B2Mar 18, 2003
Semiconductor device having a thermoset-containing dielectric material and methods for fabricating the same
IBM3 citations63
US7303639B2Dec 4, 2007
Method for producing Z-axis interconnection assembly of printed wiring board elements
IBM3 citations61
US6843929B1Jan 18, 2005
Accelerated etching of chromium
IBM3 citations61
US6609296B1Aug 26, 2003
Method of making a printed circuit board having filled holes and a fill member for use therewith including reinforcement means
IBM3 citations61
US7329816B2Feb 12, 2008
Electronic package with optimized lamination process
IBM2 citations60
US7128256B2Oct 31, 2006
Z-interconnections with liquid crystal polymer dielectric films
IBM0 citations52
GEN ELECTRIC
1 patentShowing the top 50 of 52 patents by PatentIndex Score.