Inventor
STREETT DAREN EUGENE
US14 patents
⚠️ This page may combine multiple inventors who share the name “STREETT DAREN EUGENE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MICROSOFT TECHNOLOGY LICENSING LLC
8 patentsUS12086600B2Sep 10, 2024
Branch target buffer with shared target bits
MICROSOFT TECHNOLOGY LICENSING LLC0 citations59
US12260220B2Mar 25, 2025
Accelerating fetch target queue (FTQ) processing in a processor
MICROSOFT TECHNOLOGY LICENSING LLC0 citations58
US12229568B2Feb 18, 2025
Methods and circuitry for efficient management of local branch history registers
MICROSOFT TECHNOLOGY LICENSING LLC0 citations58
US11768688B1Sep 26, 2023
Methods and circuitry for efficient management of local branch history registers
MICROSOFT TECHNOLOGY LICENSING LLC0 citations58
US11789740B2Oct 17, 2023
Performing branch predictor training using probabilistic counter updates in a processor
MICROSOFT TECHNOLOGY LICENSING LLC0 citations51
US11995443B2May 28, 2024
Reuse of branch information queue entries for multiple instances of predicted control instructions in captured loops in a processor
MICROSOFT TECHNOLOGY LICENSING LLC0 citations50
US11928474B2Mar 12, 2024
Selectively updating branch predictors for loops executed from loop buffers in a processor
MICROSOFT TECHNOLOGY LICENSING LLC0 citations48
US11915002B2Feb 27, 2024
Providing extended branch target buffer (BTB) entries for storing trunk branch metadata and leaf branch metadata
MICROSOFT TECHNOLOGY LICENSING LLC0 citations48
QUALCOMM INC
4 patentsUS7802055B2Sep 21, 2010
Virtually-tagged instruction cache with physically-tagged behavior
QUALCOMM INC5 citations62
US9823929B2Nov 21, 2017
Optimizing performance for context-dependent instructions
QUALCOMM INC0 citations52
US9317293B2Apr 19, 2016
Establishing a branch target instruction cache (BTIC) entry for subroutine returns to reduce execution pipeline bubbles, and related systems, methods, and computer-readable media
QUALCOMM INC0 citations50
US9411590B2Aug 9, 2016
Method to improve speed of executing return branch instructions in a processor
QUALCOMM INC1 citations48