Inventor
LELOUP XAVIER LOIC
US3 patents
Patents
3 patentsUS11372717B2Jun 28, 2022
Memory with system ECC
QUALCOMM INC0 citations60
US11295803B2Apr 5, 2022
Memory with dynamic voltage scaling
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US11662765B1May 30, 2023
System for providing a low latency and fast switched cascaded dual phased lock loop (PLL) architecture for die-to-die / system-on-chip (SoC) interfaces
QUALCOMM INC1 citations58