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Inventor
Chen yan-chun
TW
2 patents
Patents
2 patents
US9785046B2
Oct 10, 2017
Pattern verifying method
UNITED MICROELECTRONICS CORP
4 citations
67
US9747404B2
Aug 29, 2017
Method for optimizing an integrated circuit layout design
UNITED MICROELECTRONICS CORP
0 citations
48