Inventor
KLOSTER GRANT M
US35 patents
Patents
35 patentsUS6946384B2Sep 20, 2005
Stacked device underfill and a method of fabrication
INTEL CORP235 citations99
US6861332B2Mar 1, 2005
Air gap interconnect method
INTEL CORP250 citations99
US6605549B2Aug 12, 2003
Method for improving nucleation and adhesion of CVD and ALD films deposited onto low-dielectric-constant dielectrics
INTEL CORP162 citations99
US7320928B2Jan 22, 2008
Method of forming a stacked device filler
INTEL CORP227 citations97
US7087538B2Aug 8, 2006
Method to fill the gap between coupled wafers
INTEL CORP237 citations97
US7018918B2Mar 28, 2006
Method of forming a selectively converted inter-layer dielectric using a porogen material
INTEL CORP76 citations97
US6737365B1May 18, 2004
Forming a porous dielectric layer
INTEL CORP61 citations95
US7303989B2Dec 4, 2007
Using zeolites to improve the mechanical strength of low-k interlayer dielectrics
INTEL CORP22 citations93
US7294568B2Nov 13, 2007
Formation of air gaps in an interconnect structure using a thin permeable hard mask and resulting structures
INTEL CORP22 citations93
US7238604B2Jul 3, 2007
Forming thin hard mask over air gap or porous dielectric
INTEL CORP42 citations92
US7169715B2Jan 30, 2007
Forming a dielectric layer using porogens
INTEL CORP18 citations92
US6943121B2Sep 13, 2005
Selectively converted inter-layer dielectric
INTEL CORP43 citations92
US6903461B2Jun 7, 2005
Semiconductor device having a region of a material which is vaporized upon exposing to ultraviolet radiation
INTEL CORP16 citations92
US6734094B2May 11, 2004
Method of forming an air gap within a structure by exposing an ultraviolet sensitive material to ultraviolet radiation
INTEL CORP16 citations92
US7294934B2Nov 13, 2007
Low-K dielectric structure and method
INTEL CORP21 citations88
US9932671B2Apr 3, 2018
Precursor and process design for photo-assisted metal atomic layer deposition (ALD) and chemical vapor deposition (CVD)
INTEL CORP10 citations84
US9530733B2Dec 27, 2016
Forming layers of materials over small regions by selective chemical reaction including limiting enchroachment of the layers over adjacent regions
INTEL CORP8 citations84
US7365375B2Apr 29, 2008
Organic-framework zeolite interlayer dielectrics
INTEL CORP10 citations84
US7344972B2Mar 18, 2008
Photosensitive dielectric layer
INTEL CORP16 citations84
US7332406B2Feb 19, 2008
Air gap interconnect structure and method
INTEL CORP11 citations84
US7220668B2May 22, 2007
Method of patterning a porous dielectric material
INTEL CORP11 citations84
US6992391B2Jan 31, 2006
Dual-damascene interconnects without an etch stop layer by alternating ILDs
INTEL CORP12 citations83
US6984873B2Jan 10, 2006
Method of forming a stacked device filler
INTEL CORP11 citations82
US6930391B2Aug 16, 2005
Method for alloy-electroplating group IB metals with refractory metals for interconnections
INTEL CORP15 citations81
US6846755B2Jan 25, 2005
Bonding a metal component to a low-k dielectric material
INTEL CORP6 citations74
US10971600B2Apr 6, 2021
Selective gate spacers for semiconductor devices
INTEL CORP1 citations72
US10396176B2Aug 27, 2019
Selective gate spacers for semiconductor devices
INTEL CORP3 citations72
US6734118B2May 11, 2004
Dielectric material treatment
INTEL CORP8 citations71
US7180180B2Feb 20, 2007
Stacked device underfill and a method of fabrication
INTEL CORP2 citations63
US11532724B2Dec 20, 2022
Selective gate spacers for semiconductor devices
INTEL CORP0 citations62
US7239019B2Jul 3, 2007
Selectively converted inter-layer dielectric
INTEL CORP2 citations62
US7179755B2Feb 20, 2007
Forming a porous dielectric layer and structures formed thereby
INTEL CORP3 citations61
US7138158B2Nov 21, 2006
Forming a dielectric layer using a hydrocarbon-containing precursor
INTEL CORP2 citations61
US7034399B2Apr 25, 2006
Forming a porous dielectric layer
INTEL CORP2 citations61
US7544896B2Jun 9, 2009
Forming a porous dielectric layer and structures formed thereby
INTEL CORP0 citations50