Inventor

RAMANATHAN SHRIRAM

US47 patents

⚠️ This page may combine multiple inventors who share the name “RAMANATHAN SHRIRAM”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RAMANATHAN SHRIRAM

INTEL CORP

Stacked device underfill and a method of fabrication

3D integrated circuits using thick metal for backside connections and offset bumps

Portable NMR device and method for making and using the same

Method of forming a stacked device filler

Integrated on-chip NMR and ESR device and method for making and using the same

Method to fill the gap between coupled wafers

Wafer bonding with highly compliant plate having filler material enclosed hollow core

Methods of forming channels on an integrated circuit die and die cooling systems including such channels

Method and apparatus for low temperature copper to copper bonding

Metal-metal bonding of compliant interconnect

Forming a hybrid device

Methods of forming channels on an integrated circuit die and die cooling systems including such channels

Method of forming vias on a wafer stack using laser ablation

Microelectronic assembly having thermoelectric elements to cool a die and a method of making the same

Three-dimensional stacked substrate arrangements

Method of forming a stacked device filler

Microelectronic assembly having thermoelectric elements to cool a die and a method of making the same

Method of bonding semiconductor devices

Methods of forming channels on an integrated circuit die and die cooling systems including such channels

Microelectronic assembly having thermoelectric elements to cool a die and a method of making the same

Method of forming self-passivating interconnects and resulting devices

Stacked device underfill and a method of fabrication

Wafer stacking using interconnect structures of substantially uniform height

Portable NMR device and method for making and using the same

Stacked wafer or die packaging with enhanced thermal and device performance

Integrating thermoelectric elements into wafer for heat extraction

Deposition of diffusion barrier

Metal-metal bonding of compliant interconnect

Device and method using magnetic pattern on disk

Method for wafer stacking using copper structures of substantially uniform height

RAMANATHAN SHRIRAM

Three-dimensional stacked substrate arrangements

Electric field induced phase transitions and dynamic tuning of the properties of oxide structures

Vanadium oxide thin films

Device, method, and system for separation and detection of biomolecules and cells

Three-dimensional stacked substrate arrangements

Solid oxide fuel cell with reinforced electrolyte membrane

Phase transition devices and smart capacitive devices

Micro-scale energy conversion devices and methods

Catalyst material for fuel cell

PURDUE RESEARCH FOUNDATION

Electric field sensing devices and systems and method of making the same

Microstructurally engineered perovskite gas sensor

Porous perovskite nickelates with enhanced electrochromic properties and systems thereof

Ultralow concentration sensing of bio-matter with perovskite nickelate devices and arrays

LU DAOQIANG

Microelectronic package having direct contact heat spreader and method of manufacturing same

Microelectronic package having direct contact heat spreader and method of manufacturing same

HARVARD COLLEGE

Dopant-driven phase transitions in correlated metal oxides

ZHOU YOU

Electrically-driven phase transitions in functional oxide heterostructures