Inventor

LIU PO-WEI

TW60 patents

⚠️ This page may combine multiple inventors who share the name “LIU PO-WEI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIU PO-WEI

TAIWAN SEMICONDUCTOR MFG CO LTD

Deep trench isolation structure and method of making the same

Strap-cell architecture for embedded memory

Architecture to improve cell size for compact array of split gate flash cell with buried common source structure

Selective polysilicon growth for deep trench polysilicon isolation structure

Deep trench isolation structure and method of making the same

Semiconductor structure and fabricating method thereof

Method to improve memory cell erasure

High endurance non-volatile memory cell

Control gate strap layout to improve a word line etch process window

Method for eliminating divot formation and semiconductor device manufactured using the same

Device-region layout for embedded flash

Control gate strap layout to improve a word line etch process window

Semiconductor device and manufacturing method thereof

Non-volatile memory semiconductor device and manufacturing method thereof

Semiconductor device and manufacturing method thereof

Semiconductor device and manufacturing method thereof

BCD device layout area defined by a deep trench isolation structure and methods for forming the same

BCD device layout area defined by a deep trench isolation structure and methods for forming the same

ONON sidewall structure for memory device and method for making the same

Deep trench isolation structure and method of making the same

Method for eliminating divot formation and semiconductor device manufactured using the same

Selective polysilicon growth for deep trench polysilicon isolation structure

Strap-cell architecture for embedded memory

Device-region layout for embedded flash

ONON sidewall structure for memory device and method for making the same

Semiconductor structure

ONON sidewall structure for memory device and methods of making the same

BCD device layout area defined by a deep trench isolation structure and methods for forming the same

Semiconductor device and manufacturing method thereof

Strap-cell architecture for embedded memory

Device-region layout for embedded flash

Semiconductor device and manufacturing method thereof

Strap-cell architecture for embedded memory

Semiconductor structure and method for forming the same

Method to reduce kink effect in semiconductor devices

Non-volatile memory semiconductor device with electrostatic discharge protection, planarization layers, and manufacturing method thereof

Semiconductor device and manufacturing method thereof

Semiconductor device and manufacturing method thereof

Semiconductor memory device and manufacturing method thereof

Logic compatible flash memory cells

Semiconductor structures and manufacturing method thereof

Semiconductor isolation structure and method of making the same

Device-region layout for embedded flash

TAIWAN SEMICONDUCTOR MFG

Methods and apparatus for non-volatile memory cells with increased programming efficiency

Method of forming a logic compatible flash memory

Architecture to improve cell size for compact array of split gate flash cell

Methods and apparatus for non-volatile memory cells with increased programming efficiency

REALTEK SEMICONDUCTOR CORP

Method for determining integrity of memory

Operation method of network device and control chip of network device

LIU PO-WEI

Fin-like field effect transistor (FinFET) non-volatile random access memory (NVRAM) device with bottom erase gate