Inventor
SMITH JESSE DANIEL
US5 patents
Patents
5 patentsUS7737757B2Jun 15, 2010
Low power level shifting latch circuits with gated feedback for high speed integrated circuits
IBM9 citations82
US7844869B2Nov 30, 2010
Implementing enhanced LBIST testing of paths including arrays
IBM7 citations71
US7925950B2Apr 12, 2011
Implementing enhanced array access time tracking with logic built in self test of dynamic memory and random logic
IBM3 citations61
US7911827B2Mar 22, 2011
Implementing enhanced SRAM stability and enhanced chip yield with configurable wordline voltage levels
IBM3 citations61
US7724585B2May 25, 2010
Implementing local evaluation of domino read SRAM with enhanced SRAM cell stability
IBM4 citations61