Inventor

JUNG RYAN O

US23 patents

⚠️ This page may combine multiple inventors who share the name “JUNG RYAN O”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JUNG RYAN O

IBM

Method to form dual channel semiconductor material fins

Gate cut with high selectivity to preserve interlevel dielectric layer

Method and structure for enabling high aspect ratio sacrificial gates

Method and structure for enabling high aspect ratio sacrificial gates

Gate cut with high selectivity to preserve interlevel dielectric layer

Method to form dual channel semiconductor material fins

Method and structure for enabling high aspect ratio sacrificial gates

Trench formation for dielectric filled cut region

Trench formation for dielectric filled cut region

Method and structure for enabling high aspect ratio sacrificial gates

Gate cut with high selectivity to preserve interlevel dielectric layer

Wafer backside particle mitigation

Gate cut with high selectivity to preserve interlevel dielectric layer

Method and structure for enabling controlled spacer RIE

Method and structure for enabling controlled spacer RIE

Wafer backside particle mitigation

GLOBALFOUNDRIES INC

Methods of patterning features having differing widths

Methods of patterning features having differing widths

Junction overlap control in a semiconductor device using a sacrificial spacer layer

JUNG RYAN O

Method of simultaneously forming multiple structures having different critical dimensions using sidewall transfer

Image transfer process employing a hard mask layer

RAGHUNATHAN SUDHARSHANAN

Sidewall image transfer process with multiple critical dimensions

CHEN SHYNG-TSONG

Three photomask sidewall image transfer method