Inventor
HELMS MARKUS
DE28 patents
Patents
28 patentsUS10380033B2Aug 13, 2019
Multi-engine address translation facility
IBM6 citations84
US11775445B2Oct 3, 2023
Translation support for a virtual cache
IBM2 citations73
US10380032B2Aug 13, 2019
Multi-engine address translation facility
IBM1 citations73
US10303759B2May 28, 2019
Memory preserving parse tree based compression with entropy coding
IBM2 citations73
US10083124B1Sep 25, 2018
Translating virtual memory addresses to physical addresses
IBM6 citations73
US9898348B2Feb 20, 2018
Resource mapping in multi-threaded central processor units
IBM2 citations73
US12141076B2Nov 12, 2024
Translation support for a virtual cache
IBM0 citations62
US11308277B2Apr 19, 2022
Memory preserving parse tree based compression with entropy coding
IBM0 citations62
US11263398B2Mar 1, 2022
Memory preserving parse tree based compression with entropy coding
IBM0 citations62
US11036647B2Jun 15, 2021
Suspending translation look-aside buffer purge execution in a multi-processor environment
IBM0 citations62
US10956341B2Mar 23, 2021
Multi-engine address translation facility
IBM0 citations62
US10929312B2Feb 23, 2021
Zone-SDID mapping scheme for TLB purges
IBM0 citations62
US10606762B2Mar 31, 2020
Sharing virtual and real translations in a virtual cache
IBM1 citations62
US7466716B2Dec 16, 2008
Reducing latency in a channel adapter by accelerated I/O control block processing
IBM4 citations59
US10831674B2Nov 10, 2020
Translation support for a virtual cache
IBM0 citations52
US10810134B2Oct 20, 2020
Sharing virtual and real translations in a virtual cache
IBM0 citations52
US10698836B2Jun 30, 2020
Translation support for a virtual cache
IBM0 citations52
US10635603B2Apr 28, 2020
Multi-engine address translation facility
IBM0 citations52
US10621105B2Apr 14, 2020
Multi-engine address translation facility
IBM0 citations52
US10521506B2Dec 31, 2019
Memory preserving parse tree based compression with entropy coding
IBM0 citations52
US10353827B2Jul 16, 2019
Zone-SDID mapping scheme for TLB purges
IBM0 citations52
US10353828B2Jul 16, 2019
Zone-SDID mapping scheme for TLB purges
IBM0 citations52
US9886327B2Feb 6, 2018
Resource mapping in multi-threaded central processor units
IBM0 citations52
US10698835B2Jun 30, 2020
Suspending translation look-aside buffer purge execution in a multi-processor environment
IBM0 citations51
US10387326B2Aug 20, 2019
Incorporating purge history into least-recently-used states of a translation lookaside buffer
IBM0 citations51
US10353825B2Jul 16, 2019
Suspending translation look-aside buffer purge execution in a multi-processor environment
IBM0 citations51
US10289562B2May 14, 2019
Incorporating purge history into least-recently-used states of a translation lookaside buffer
IBM0 citations51
US10248575B2Apr 2, 2019
Suspending translation look-aside buffer purge execution in a multi-processor environment
IBM0 citations51