P

Inventor

WU CHANG-RONG

TW34 patents
⚠️ This page may combine multiple inventors who share the name “WU CHANG-RONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NANYA TECHNOLOGY CORP

27 patents
US6737334B2May 18, 2004

Method of fabricating a shallow trench isolation structure

NANYA TECHNOLOGY CORP26 citations92
US7101777B2Sep 5, 2006

Methods for manufacturing stacked gate structure and field effect transistor provided with the same

NANYA TECHNOLOGY CORP11 citations83
US6821872B1Nov 23, 2004

Method of making a bit line contact device

NANYA TECHNOLOGY CORP19 citations83
US7154159B2Dec 26, 2006

Trench isolation structure and method of forming the same

NANYA TECHNOLOGY CORP12 citations82
US6960530B2Nov 1, 2005

Method of reducing the aspect ratio of a trench

NANYA TECHNOLOGY CORP8 citations73
US6794266B2Sep 21, 2004

Method for forming a trench isolation structure

NANYA TECHNOLOGY CORP10 citations73
US6858516B2Feb 22, 2005

Manufacturing method of a high aspect ratio shallow trench isolation region

NANYA TECHNOLOGY CORP10 citations72
US6833311B2Dec 21, 2004

Manufacturing method for a shallow trench isolation region with high aspect ratio

NANYA TECHNOLOGY CORP11 citations72
US6770563B2Aug 3, 2004

Process of forming a bottle-shaped trench

NANYA TECHNOLOGY CORP11 citations71
US6828239B2Dec 7, 2004

Method of forming a high aspect ratio shallow trench isolation

NANYA TECHNOLOGY CORP11 citations68
US6825094B2Nov 30, 2004

Method for increasing capacitance of deep trench capacitors

NANYA TECHNOLOGY CORP4 citations63
US7375017B2May 20, 2008

Method for fabricating semiconductor device having stacked-gate structure

NANYA TECHNOLOGY CORP3 citations62
US7022603B2Apr 4, 2006

Method for fabricating semiconductor device having stacked-gate structure

NANYA TECHNOLOGY CORP2 citations62
US6586324B2Jul 1, 2003

Method of forming interconnects

NANYA TECHNOLOGY CORP4 citations62
US6743728B2Jun 1, 2004

Method for forming shallow trench isolation

NANYA TECHNOLOGY CORP5 citations61
US6693006B2Feb 17, 2004

Method for increasing area of a trench capacitor

NANYA TECHNOLOGY CORP5 citations61
US7232718B2Jun 19, 2007

Method for forming a deep trench capacitor buried plate

NANYA TECHNOLOGY CORP4 citations59
US6861333B2Mar 1, 2005

Method of reducing trench aspect ratio

NANYA TECHNOLOGY CORP3 citations57
US9070871B2Jun 30, 2015

Method for fabricating magnetoresistive random access memory element

NANYA TECHNOLOGY CORP0 citations51
US8999733B2Apr 7, 2015

Method of forming RRAM structure

NANYA TECHNOLOGY CORP1 citations51
US8916392B2Dec 23, 2014

Magnetoresistive random access memory element and fabrication method thereof

NANYA TECHNOLOGY CORP0 citations51
US7943917B2May 17, 2011

Non-volatile memory cell and fabrication method thereof

NANYA TECHNOLOGY CORP0 citations51
US6900118B2May 31, 2005

Method for preventing contact defects in interlayer dielectric layer

NANYA TECHNOLOGY CORP1 citations50
US6958283B2Oct 25, 2005

Method for fabricating trench isolation

NANYA TECHNOLOGY CORP0 citations49
US6794270B2Sep 21, 2004

Method for shallow trench isolation fabrication and partial oxide layer removal

NANYA TECHNOLOGY CORP1 citations48
US7138338B2Nov 21, 2006

Method and composite hard mask for forming deep trenches in a semiconductor substrate

NANYA TECHNOLOGY CORP1 citations45
US7101802B2Sep 5, 2006

Method for forming bottle-shaped trench

NANYA TECHNOLOGY CORP0 citations44

HSIEH CHUN-I

5 patents

HO HSIN-JUNG

2 patents