P

Inventor

KE YANJING

US13 patents
⚠️ This page may combine multiple inventors who share the name “KE YANJING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ALTERA CORP

6 patents
US8837571B1Sep 16, 2014

Apparatus and methods for on-die instrumentation

ALTERA CORP9 citations84
US9748934B1Aug 29, 2017

Systems and methods for reducing power supply noise or jitter

ALTERA CORP8 citations83
US9231631B1Jan 5, 2016

Circuits and methods for adjusting the voltage swing of a signal

ALTERA CORP18 citations83
US9054721B1Jun 9, 2015

Systems and methods for digital calibration of successive-approximation-register analog-to-digital converter

ALTERA CORP4 citations73
US9100112B1Aug 4, 2015

Latency built-in self-test

ALTERA CORP5 citations71
US10340904B2Jul 2, 2019

Method and apparatus for phase-aligned 2X frequency clock generation

ALTERA CORP1 citations61

DING WEIQI

3 patents
US8416001B2Apr 9, 2013

Techniques for reducing duty cycle distortion in periodic signals

DING WEIQI8 citations84
US8174294B1May 8, 2012

Configurable buffer circuits and methods

DING WEIQI5 citations73
US8395421B1Mar 12, 2013

Configurable buffer circuits and methods

DING WEIQI0 citations52

ANALOGIX SEMICONDUCTOR INC

2 patents
US7861105B2Dec 28, 2010

Clock data recovery (CDR) system using interpolator and timing loop module

ANALOGIX SEMICONDUCTOR INC3 citations61
US7692497B2Apr 6, 2010

PLLS covering wide operating frequency ranges

ANALOGIX SEMICONDUCTOR INC3 citations61

LI WEI

1 patent
US8674862B1Mar 18, 2014

Systems and methods for digital calibration of successive-approximation-register analog-to-digital converter

LI WEI19 citations92

INTEL CORP

1 patent
US11115177B2Sep 7, 2021

Methods and apparatus for performing clock and data duty cycle correction in a high-speed link

INTEL CORP6 citations73