Inventor
MARCHAND CÉDRIC
FR9 patents
Patents
9 patentsUS11133827B2Sep 28, 2021
Simplified, presorted, syndrome-based, extended min-sum (EMS) decoding of non-binary LDPC codes
UNIV BRETAGNE SUD2 citations70
US10560120B2Feb 11, 2020
Elementary check node processing for syndrome computation for non-binary LDPC codes decoding
UNIV BRETAGNE SUD3 citations70
US10476523B2Nov 12, 2019
Elementary check node-based syndrome decoding using pre-sorted inputs
UNIV BRETAGNE SUD1 citations59
US11290128B2Mar 29, 2022
Simplified check node processing in non-binary LDPC decoder
UNIV BRETAGNE SUD0 citations49
US11095308B2Aug 17, 2021
Hybrid architectures for check node processing of extended min-sum (EMS) decoding of non-binary LDPC codes
UNIV BRETAGNE SUD0 citations49
US11545998B2Jan 3, 2023
Offset value determination in a check node processing unit for message-passing decoding of non-binary codes
UNIV BRETAGNE SUD0 citations47
US11476870B2Oct 18, 2022
Variable node processing methods and devices for message-passing decoding of non-binary codes
UNIV BRETAGNE SUD0 citations47
US11245421B2Feb 8, 2022
Check node processing methods and devices with insertion sort
UNIV BRETAGNE SUD0 citations47
US10637510B2Apr 28, 2020
Methods and devices for error correcting codes decoding
UNIV BRETAGNE SUD0 citations39