Inventor

REITEN MARK

US52 patents

⚠️ This page may combine multiple inventors who share the name “REITEN MARK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

REITEN MARK

SILICON STORAGE TECH INC

Memory device and method for varying program state separation based upon frequency of use

Precise data tuning method and apparatus for analog neural memory in an artificial neural network

Power management for an analog neural memory in a deep learning artificial neural network

Precision tuning for the programming of analog neural memory in a deep learning artificial neural network

Deep learning neural network classifier using non-volatile memory array

Neural network classifier using array of three-gate non-volatile memory cells

Configurable analog neural memory system for deep learning neural network

Precision tuning for the programming of analog neural memory in a deep learning artificial neural network

Neural network classifier using array of two-gate non-volatile memory cells

Output circuits for an analog neural memory system for deep learning neural network

Neural network classifier using array of three-gate non-volatile memory cells

Temperature compensation in an analog memory array by changing a threshold voltage of a selected memory cell in the array

Configurable input blocks and output blocks and physical layout for analog neural memory in deep learning artificial neural network

System for converting neuron current into neuron current-based time pulses in an analog neural memory in a deep learning artificial neural network

Neural network classifier using array of stacked gate non-volatile memory cells

Method and apparatus for programming analog neural memory in a deep learning artificial neural network

Neural network classifier using array of four-gate non-volatile memory cells

Temperature and leakage compensation for memory cells in an analog neural memory system used in a deep learning neural network

System and method for managing peak power demand and noise in non-volatile memory array

Three-dimensional flash NOR memory system with configurable pins

Multi-step voltage for forming resistive access memory (RRAM) cell filament

Adaptive bias decoder for non-volatile memory system

Adaptive bias decoder for non-volatile memory system

Adaptive bias decoder for non-volatile memory system

Output array neuron conversion and calibration for analog neural memory in deep learning artificial neural network

Neural network classifier using array of three-gate non-volatile memory cells

Neural network classifier using array of three-gate non-volatile memory cells

Neural network classifier using array of three-gate non-volatile memory cells

Output circuit

Input function circuit block and output neuron circuit block coupled to a vector-by-matrix multiplication array in an artificial neural network

Circuitry to compensate for data drift in analog neural memory in an artificial neural network

Verifying or reading a cell in an analog neural memory in a deep learning artificial neural network

Neural network classifier using array of three-gate non-volatile memory cells

Adaptive bias decoder to provide a voltage to a control gate line in an analog neural memory array in artificial neural network

Precise data tuning method and apparatus for analog neural memory in an artificial neural network

Input and digital output mechanisms for analog neural memory in a deep learning artificial neural network

Temperature compensation for memory cells in an analog neural memory system used in a deep learning neural network

Method of scanning an image using non-volatile memory array neural network classifier

Memory device of non-volatile memory cells

Deep learning neural network classifier using non-volatile memory array

Precise data tuning method and apparatus for analog neural memory in an artificial neural network

Output circuitry for non-volatile memory array in neural network

Summing circuit for neural network

Verification of a weight stored in a non-volatile memory cell in a neural network following a programming operation

Programming methods for neural network using non-volatile memory array

Verification of a weight stored in a non-volatile memory cell in a neural network following a programming operation

Output circuitry for non-volatile memory array in neural network

Precise programming method and apparatus for analog neural memory in an artificial neural network

Precision tuning for the programming of analog neural memory in a deep learning artificial neural network

TRAN HIEU VAN

Three-dimensional flash memory system