Inventor

CHO CHANG-HYUN

KR62 patents

⚠️ This page may combine multiple inventors who share the name “CHO CHANG-HYUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHO CHANG-HYUN

SAMSUNG ELECTRONICS CO LTD

Method for fabricating MOS transistor

Self aligned contact pad in a semiconductor device and method for forming the same

Methods of forming self-aligned contact pads on electrically conductive lines

Method of forming self-aligned contact pads on electrically conductive lines

Method for forming self-aligned contact

Self-aligned buried contact pair and method of forming the same

Methods of implanting ions into different active areas to provide active areas having increased ion concentrations adjacent to isolation structures

Semiconductor memory device with built-in self test circuit

Methods of manufacturing semiconductor devices having storage nodes

Method for forming a self aligned contact in a semiconductor device

Method for forming a dielectric layer

Test circuit and method for refresh and descrambling in an integrated memory circuit

Semiconductor device and method of fabricating the same

Semiconductor device and method for fabricating the same

Semiconductor device and method of manufacturing the same

Semiconductor device including contact pads

Self-aligned inner gate recess channel transistor and method of forming the same

Method for forming a self aligned contact in a semiconductor device

Method for fabricating a semiconductor device having different gate oxide layers

Semiconductor memory device including storage nodes and resistors and method of manufacturing the same

Methods of forming integrated circuit memory devices that include a plurality of landing pad holes that are arranged in a staggered pattern and integrated circuit memory devices formed thereby

Method of forming self-aligned inner gate recess channel transistor

Self-Aligned buried contact pair

Semiconductor device including storage node and method of manufacturing the same

Method of forming a self-aligned contact pad for a semiconductor device

Semiconductor devices having storage nodes

Semiconductor memory device including storage nodes and resistors and method of manufacturing the same

Semiconductor devices and methods of manufacturing the same

Semiconductor device having capacitors

Serial memory interface using interlaced scan

Semiconductor device and method of fabricating the same

Semiconductor device and method of fabricating the same

Integrated circuit testing apparatus and method

Method of fabricating a MOS transistor with double sidewall spacers in a peripheral region and single sidewall spacers in a cell region

Semiconductor device including storage node and method of manufacturing the same

Methods providing oxide layers having reduced thicknesses at central portions thereof

Devices with active areas having increased ion concentrations adjacent to isolation structures

Method of testing single-order address memory

Test interface boards, test systems, and methods of operating test interface boards

Semiconductor device having a trench type device isolation film and method for fabricating the same

Semiconductor device

Semiconductor device with increased effective channel length and method of manufacturing the same

CHO CHANG-HYUN

Harmonic drive using profile shifted gear

Probe card, and apparatus and method for testing semiconductor device using the probe card

KANG SUNG CHUL

Weight compensation mechanism and method using bevel gear and robot arm using the same

KOREA INST SCI & TECH

Working robot, actuator and control method thereof

YOON CHAN SIC

Method of manufacturing a semiconductor device

KIM YANGGI

Apparatus and method for testing a semiconductor device

CHOI YONG-LACK

Method of fabricating semiconductor device

SK HYNIX INC

Semiconductor device and method for fabricating the same