Inventor

NURVITADHI ERIKO

US88 patents

Patents

50 patents

US11360767B2Jun 14, 2022

Instructions and logic to perform floating point and integer operations for machine learning

INTEL CORP39 citations98

US11169799B2Nov 9, 2021

Instructions and logic to perform floating-point and integer operations for machine learning

INTEL CORP36 citations98

US11080046B2Aug 3, 2021

Instructions and logic to perform floating point and integer operations for machine learning

INTEL CORP38 citations98

US10474458B2Nov 12, 2019

Instructions and logic to perform floating-point and integer operations for machine learning

INTEL CORP46 citations98

US10353706B2Jul 16, 2019

Instructions and logic to perform floating-point and integer operations for machine learning

INTEL CORP47 citations98

US10186011B2Jan 22, 2019

Programmable coarse grained and sparse matrix compute hardware with advanced scheduling

INTEL CORP37 citations98

US10346944B2Jul 9, 2019

Machine learning sparse computation mechanism

INTEL CORP20 citations94

US10146738B2Dec 4, 2018

Hardware accelerator architecture for processing very-sparse and hyper-sparse matrix data

INTEL CORP43 citations94

US10706498B2Jul 7, 2020

Machine learning sparse computation mechanism

INTEL CORP13 citations93

US11373088B2Jun 28, 2022

Machine learning accelerator mechanism

INTEL CORP28 citations92

US10620951B2Apr 14, 2020

Matrix multiplication acceleration of sparse matrices using column folding and squeezing

INTEL CORP35 citations92

US10776110B2Sep 15, 2020

Apparatus and method for adaptable and efficient lane-wise tensor processing

INTEL CORP20 citations91

US11360808B2Jun 14, 2022

Efficient thread group scheduling

INTEL CORP8 citations86

US11210760B2Dec 28, 2021

Programmable coarse grained and sparse matrix compute hardware with advanced scheduling

INTEL CORP9 citations86

US11693691B2Jul 4, 2023

Systems, methods, and apparatuses for heterogeneous computing

INTEL CORP4 citations85

US10180928B2Jan 15, 2019

Heterogeneous hardware accelerator architecture for processing sparse matrix data with skewed non-zero distributions

INTEL CORP15 citations85

US11074072B2Jul 27, 2021

Machine learning sparse computation mechanism for arbitrary neural networks, arithmetic compute microarchitecture, and sparsity for training mechanism

INTEL CORP6 citations83

US11416281B2Aug 16, 2022

Systems, methods, and apparatuses for heterogeneous computing

INTEL CORP4 citations83

US11093277B2Aug 17, 2021

Systems, methods, and apparatuses for heterogeneous computing

INTEL CORP6 citations83

US12198221B2Jan 14, 2025

Compute optimization mechanism for deep neural networks

INTEL CORP1 citations75

US11797837B2Oct 24, 2023

Dynamic distributed training of machine learning models

INTEL CORP4 citations75

US12141578B2Nov 12, 2024

Instructions and logic to perform floating point and integer operations for machine learning

INTEL CORP2 citations73

US12050984B2Jul 30, 2024

Specialized fixed function hardware for efficient convolution

INTEL CORP1 citations73

US11748298B2Sep 5, 2023

Graphics processing integrated circuit package

INTEL CORP1 citations73

US11693658B2Jul 4, 2023

Compute optimizations for neural networks using ternary weight

INTEL CORP1 citations73

US11269643B2Mar 8, 2022

Data operations and finite state machine for machine learning via bypass of computational tasks based on frequently-used data values

INTEL CORP3 citations73

US11222392B2Jan 11, 2022

Compute optimization mechanism for deep neural networks

INTEL CORP1 citations73

US11216722B2Jan 4, 2022

Hardware accelerator template and design framework for implementing recurrent neural networks

INTEL CORP5 citations73

US11010659B2May 18, 2021

Dynamic precision for neural network compute operations

INTEL CORP2 citations73

US10956330B2Mar 23, 2021

Extend GPU/CPU coherency to multi-GPU cores

INTEL CORP2 citations73

US10943325B2Mar 9, 2021

Machine learning sparse computation mechanism

INTEL CORP1 citations73

US10902547B2Jan 26, 2021

Compute optimization mechanism for deep neural networks

INTEL CORP2 citations73

US10769748B2Sep 8, 2020

Programmable coarse grained and sparse matrix compute hardware with advanced scheduling

INTEL CORP3 citations73

US10540318B2Jan 21, 2020

Graphics processing integrated circuit package

INTEL CORP2 citations73

US10521349B2Dec 31, 2019

Extend GPU/CPU coherency to multi-GPU cores

INTEL CORP2 citations73

US12135981B2Nov 5, 2024

Systems, methods, and apparatuses for heterogeneous computing

INTEL CORP1 citations72

US11625245B2Apr 11, 2023

Compute-in-memory systems and methods

INTEL CORP3 citations72

US12014265B2Jun 18, 2024

Machine learning sparse computation mechanism for arbitrary neural networks, arithmetic compute microarchitecture, and sparsity for training mechanism

INTEL CORP1 citations71

US11315007B2Apr 26, 2022

Neural network scheduling mechanism

INTEL CORP3 citations71

US12086705B2Sep 10, 2024

Compute optimization mechanism for deep neural networks

INTEL CORP3 citations70

US12039435B2Jul 16, 2024

Machine learning accelerator mechanism

INTEL CORP1 citations70

US11328037B2May 10, 2022

Memory-size- and bandwidth-efficient method for feeding systolic array matrix multipliers

INTEL CORP5 citations69

US12430131B2Sep 30, 2025

Compute optimizations for neural networks

INTEL CORP0 citations63

US12346798B2Jul 1, 2025

Dynamic precision for neural network compute operations

INTEL CORP0 citations63

Showing the top 50 of 88 patents by PatentIndex Score.

NURVITADHI ERIKO

Patents

Instructions and logic to perform floating point and integer operations for machine learning

Instructions and logic to perform floating-point and integer operations for machine learning

Instructions and logic to perform floating point and integer operations for machine learning

Instructions and logic to perform floating-point and integer operations for machine learning

Instructions and logic to perform floating-point and integer operations for machine learning

Programmable coarse grained and sparse matrix compute hardware with advanced scheduling

Machine learning sparse computation mechanism

Hardware accelerator architecture for processing very-sparse and hyper-sparse matrix data

Machine learning sparse computation mechanism

Machine learning accelerator mechanism

Matrix multiplication acceleration of sparse matrices using column folding and squeezing

Apparatus and method for adaptable and efficient lane-wise tensor processing

Efficient thread group scheduling

Programmable coarse grained and sparse matrix compute hardware with advanced scheduling

Systems, methods, and apparatuses for heterogeneous computing

Heterogeneous hardware accelerator architecture for processing sparse matrix data with skewed non-zero distributions

Compute optimizations for neural networks using bipolar binary weight

Specialized fixed function hardware for efficient convolution

Neural network scheduling mechanism

Compute optimization mechanism for deep neural networks

Compute optimizations for neural networks

Extend GPU/CPU coherency to multi-GPU cores

Machine learning sparse computation mechanism for arbitrary neural networks, arithmetic compute microarchitecture, and sparsity for training mechanism

Systems, methods, and apparatuses for heterogeneous computing

Systems, methods, and apparatuses for heterogeneous computing

Compute optimization mechanism for deep neural networks

Dynamic distributed training of machine learning models

Instructions and logic to perform floating point and integer operations for machine learning

Specialized fixed function hardware for efficient convolution

Graphics processing integrated circuit package

Compute optimizations for neural networks using ternary weight

Data operations and finite state machine for machine learning via bypass of computational tasks based on frequently-used data values

Compute optimization mechanism for deep neural networks

Hardware accelerator template and design framework for implementing recurrent neural networks

Dynamic precision for neural network compute operations

Extend GPU/CPU coherency to multi-GPU cores

Machine learning sparse computation mechanism

Compute optimization mechanism for deep neural networks

Programmable coarse grained and sparse matrix compute hardware with advanced scheduling

Graphics processing integrated circuit package

Extend GPU/CPU coherency to multi-GPU cores

Systems, methods, and apparatuses for heterogeneous computing

Compute-in-memory systems and methods

Machine learning sparse computation mechanism for arbitrary neural networks, arithmetic compute microarchitecture, and sparsity for training mechanism

Neural network scheduling mechanism

Compute optimization mechanism for deep neural networks

Machine learning accelerator mechanism

Memory-size- and bandwidth-efficient method for feeding systolic array matrix multipliers

Compute optimizations for neural networks

Dynamic precision for neural network compute operations