Inventor
GANAPATHY SABAREESH
US7 patents
Patents
7 patentsUS11636327B2Apr 25, 2023
Machine learning sparse computation mechanism for arbitrary neural networks, arithmetic compute microarchitecture, and sparsity for training mechanism
INTEL CORP6 citations83
US12014265B2Jun 18, 2024
Machine learning sparse computation mechanism for arbitrary neural networks, arithmetic compute microarchitecture, and sparsity for training mechanism
INTEL CORP1 citations71
US12346694B2Jul 1, 2025
Register file for systolic array
INTEL CORP1 citations63
US12189571B2Jan 7, 2025
Dual pipeline parallel systolic array
INTEL CORP1 citations63
US11977895B2May 7, 2024
Hierarchical thread scheduling based on multiple barriers
INTEL CORP1 citations61
US12380326B2Aug 5, 2025
Machine learning sparse computation mechanism for arbitrary neural networks, arithmetic compute microarchitecture, and sparsity for training mechanism
INTEL CORP0 citations60
US12399685B2Aug 26, 2025
Systolic array having support for output sparsity
INTEL CORP0 citations50