Inventor
LING JING
CN42 patents
⚠️ This page may combine multiple inventors who share the name “LING JING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
22 patentsUS6944728B2Sep 13, 2005
Interleaving memory access
INTEL CORP18 citations92
US7298744B1Nov 20, 2007
Method and apparatus for centralized processing of contiguously and virtually concatenated payloads
INTEL CORP10 citations83
US7061867B2Jun 13, 2006
Rate-based scheduling for packet applications
INTEL CORP12 citations83
US6892284B2May 10, 2005
Dynamic memory allocation for assigning partitions to a logical port from two groups of un-assigned partitions based on two threshold values
INTEL CORP15 citations83
US7606269B1Oct 20, 2009
Method and apparatus for detecting and managing loss of alignment in a virtually concatenated group
INTEL CORP8 citations81
US9697094B2Jul 4, 2017
Dynamically changing lockstep configuration
INTEL CORP9 citations79
US7583599B1Sep 1, 2009
Transporting stream client signals via packet interface using GFP mapping
INTEL CORP17 citations79
US12235720B2Feb 25, 2025
Adaptive error correction to improve system memory reliability, availability, and serviceability (RAS)
INTEL CORP3 citations73
US10346177B2Jul 9, 2019
Boot process with parallel memory initialization
INTEL CORP6 citations73
US7295564B2Nov 13, 2007
Virtual output queue (VoQ) management method and apparatus
INTEL CORP9 citations73
US10198354B2Feb 5, 2019
Apparatus, system, and method to flush modified data from a volatile memory to a persistent second memory
INTEL CORP4 citations71
US12417042B2Sep 16, 2025
Detection of data corruption in memory address decode circuitry
INTEL CORP0 citations62
US7154853B2Dec 26, 2006
Rate policing algorithm for packet flows
INTEL CORP3 citations62
US7065628B2Jun 20, 2006
Increasing memory access efficiency for packet applications
INTEL CORP2 citations62
US11036634B2Jun 15, 2021
Apparatus, system, and method to flush modified data from a volatile memory to a persistent second memory
INTEL CORP0 citations61
US7656891B1Feb 2, 2010
Method and apparatus enabling concurrent processing of contiguously and virtually concatenated payloads
INTEL CORP3 citations60
US7525977B1Apr 28, 2009
Control mechanism for mapping cells and packets
INTEL CORP3 citations60
US7508830B1Mar 24, 2009
Method and apparatus differential delay compensation processing of virtually concatenated data
INTEL CORP6 citations60
US7460545B1Dec 2, 2008
Enhanced SDRAM bandwidth usage and memory management for TDM traffic
INTEL CORP2 citations58
US12242342B2Mar 4, 2025
Fast memory ECC error correction
INTEL CORP0 citations51
US7564777B2Jul 21, 2009
Techniques for group alarm indication signal generation and clearing
INTEL CORP1 citations51
US12541460B2Feb 3, 2026
Memory transaction queue bypass based on configurable address and bandwidth conditions
INTEL CORP0 citations50
SNF GROUP
4 patentsUS12030832B2Jul 9, 2024
Dialkyl tin oxide composition and process for producing 2-dimethylaminoethyl (meth)acrylate
SNF GROUP0 citations60
US11767381B2Sep 26, 2023
2-dimethylaminoethyl acrylate polymers and their preparation method
SNF GROUP0 citations58
US12091480B2Sep 17, 2024
Method for producing 2-dimethylaminoethyl (meth)acrylate
SNF GROUP0 citations51
US11787889B2Oct 17, 2023
Process for the preparation of polyacrylamides using an eco-friendly lubricant composition
SNF GROUP0 citations44