Inventor

CARACCIO DANILO

IT105 patents

⚠️ This page may combine multiple inventors who share the name “CARACCIO DANILO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CARACCIO DANILO

MICRON TECHNOLOGY INC

Multi-partitioning of memories

Memory controller for managing data and error information

Methods and apparatuses for executing a plurality of queued tasks in a memory

Data state synchronization

Methods and apparatuses for requesting ready status information from a memory

Multi-partitioning of memories

Command queuing

Controller to manage NAND memories

Controller for managing multiple types of memory

Security management of ferroelectric memory device

Command queuing

Detecting page fault traffic

Hybrid memory system interface

Command queuing

Latency-based storage in a hybrid memory system

Multi-partitioning of memories

Latency-based storage in a hybrid memory system

Latency-based storage in a hybrid memory system

Data relocation in hybrid memory

Memory operations on data

Host controlled enablement of automatic background operations in a memory device

Memory management

Memory devices for detecting known initial states and related methods and electronic systems

Secure boot procedure

Storage traffic pattern detection in memory devices

Classification and mitigation of compute express link security threats

Apparatus for redundant array of independent disks

Controllers and methods for accessing memory devices via multiple modes

Log management maintenance operation and command

Memory operations on data

Maintenance command interfaces for a memory system

Hybrid memory system interface

Maintenance command interfaces for a memory system

Memory management

Wireless memory interface

Data state synchronization

Dedicated commands for memory operations

Transaction metadata

Memory operations on data

Methods and apparatuses for requesting ready status information from a memory

Apparatuses and methods for securing an access protection scheme

Memory management

Data state synchronization

Data state synchronization involving memory cells having an inverted data state written thereto

Storage class memory status

CARACCIO DANILO

Multi-partitioning feature on e-MMC

Multi-partitioning of memories

TIZIANI FEDERICO

Controller to execute error correcting code algorithms and manage NAND memories

CAMPARDO GIOVANNI

Secondary memory element for non-volatile memory

LODESTAR LICENSING GROUP LLC

Apparatuses and methods for securing an access protection scheme